Semiconductor device and method for fabricating the same

A method of fabricating a multilayer semiconductor device, comprising:

• (a) providing a semiconductor substrate;
• (b) forming a first interlayer dielectric layer, a first interconnection metal layer and a chemical mechanical polishing (CMP) stop layer over the semiconductor substrate in sequence;
• (c) forming openings in the chemical mechanical polishing (CMP) stop layer and the underlying first interconnection metal layer to expose the first interlayer dielectric layer, thereby leaving a patterned chemical mechanical polishing (CMP) stop layer and a patterned first interconnection metal layer, wherein the first interlayer dielectric layer is exposed from a bottom and a portion of sidewalls of the opening;
• (d) forming a second interlayer dielectric layer on the patterned chemical mechanical polishing (CMP) stop layer, filling in the openings;
• (e) performing a planarization process to remove a portion of the second interlayer dielectric layer until the patterned chemical mechanical polishing (CMP) stop layer is exposed, thereby leaving a remaining second interlayer dielectric layer in the openings;
• (f) removing the patterned chemical mechanical polishing (CMP) stop layer;
• and
• (g) repeating the step (b) to the step (f) to form a multilayer semiconductor device.