Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device, which includes:

• a semiconductor substrate with a first conductive type having a principal plane;
• a base region having a second conductive type and disposed on the principal plane of the semiconductor substrate;
• a source region having the first conductive type and disposed on the principal plane of the semiconductor substrate in the base region to be shallower than the base region;
• a drain region having the first conductive type, disposed on the principal plane of the semiconductor substrate, and spaced to the base region;
• a trench disposed on the principal plane of the semiconductor substrate, wherein the trench has a planer construction in such a manner that the trench penetrates the base region disposed between the source region and the drain region in a direction from the source region to the drain region;
• a trench gate electrode disposed in the trench through a gate insulation film;
• and
• a planer gate electrode disposed on the principal plane through the gate insulation film,
• the method comprising the steps of:
• forming the trench on the principal plane of the semiconductor substrate;
• forming the gate insulation film on the principal plane of the semiconductor substrate including the inner wall of the trench;
• forming the planer gate electrode on the principal plane of the semiconductor substrate through the gate insulation film together with forming the trench gate electrode in the trench through the gate insulation film;
• forming the source region by an ion implantation method with using the planer gate electrode as a mask together with forming the base region;
• and
• increasing an impurity concentration of a portion of the base region by implanting ions of a second conductive type element at a slant, the portion of the base region to be a channel region facing the planer gate electrode.

A method for manufacturing a semiconductor device, which includes:

• a semiconductor substrate with a first conductive type having a principal plane;
• a base region having a second conductive type and disposed on the principal plane of the semiconductor substrate;
• a source region having the first conductive type and disposed on the principal plane of the semiconductor substrate in the base region to be shallower than the base region;
• a drain region having the first conductive type, disposed on the principal plane of the semiconductor substrate, and spaced to the base region;
• a trench disposed on the principal plane of the semiconductor substrate, wherein the trench has a planer construction in such a manner that the trench penetrates the base region disposed between the source region and the drain region in a direction from the source region to the drain region;
• a trench gate electrode disposed in the trench through a gate insulation film;
• and
• a planer gate electrode disposed on the principal plane of the semiconductor substrate through the gate insulation film,
• the method comprising the steps of:
• forming the trench on the principal plane of the semiconductor substrate;
• forming the gate insulation film on the principal plane of the semiconductor substrate including the inner wall of the trench;
• forming the trench gate electrode in the trench through the gate insulation film;
• forming the source region together with the base region;
• increasing an impurity concentration of a portion of the base region by implanting ions of a second conductive type element, the portion of the base region to be a channel region facing the planer gate electrode and disposed on the principal plane of the semiconductor substrate;
• and
• forming the planer gate electrode on the principal plane of the semiconductor substrate through the gate insulation film.