Method of manufacturing chip integrated substrate
AssigneeShinko Electric Industries Co., Ltd.
InventorToshio KOBAYASHI
Life of this patent
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Abstract
There are provided the steps of connecting a chip component 13 to a first substrate 10 through a wire 14, providing an electrode 21 on a second substrate 20, attaching, to the first substrate 10, a molding tool 30 having a protruded portion 31 formed corresponding to an array of a bump connecting pad 12 of the first substrate 10 and a cavity 32 formed corresponding to a region in which the chip component 13 is mounted, thereby forming a first sealing resin 34 for sealing the chip component 13 and the wire 14, bonding the electrode 21 to the bump connecting pad 12 through a solder, thereby bonding the first substrate 10 to the second substrate 20, and filling a second filling resin 40 in a clearance portion between the first substrate 10 and the second substrate 20.
Claims4
A method of manufacturing a chip integrated substrate comprising the steps of:
- connecting a chip component to a first substrate having a connecting pad formed thereon through wire bonding;
- providing, on a second substrate, an electrode protruded from a surface of the substrate;
- attaching, to the first substrate, a molding tool having a protruded portion formed corresponding to an array of the connecting pad and a cavity formed corresponding to a region in which the chip component is mounted, causing the protruded portion to abut on a surface of the connecting pad, and filling the cavity with a first resin to seal the chip component and a wire with a resin;
- bonding the connecting pad to the electrode through a solder, and bonding the first substrate to the second substrate in such a manner that the chip component sealed with the resin is provided therein;
- and
- filling a second resin in a clearance portion between the first substrate and the second substrate.
Dependencies are inferred from the claim text.