Method of destructive testing the dielectric layer of a semiconductor wafer or sample

Abstract

In a method of testing a semiconductor wafer or sample having a dielectric layer overlaying a substrate of semiconducting material, a contact is caused to touch a top surface of the dielectric layer. At least a portion of the contact touching the dielectric layer is formed of iridium. A controlled electrical stimulus that causes the dielectric layer to breakdown and an electrically conductive path to form through the dielectric layer is applied to the contact touching the top surface of the dielectric layer. Either a value of the controlled electrical stimulus where breakdown of the dielectric layer occurs or a time for the breakdown of the dielectric layer to occur in response to the application of the controlled electrical stimulus is determined. From the thus determined value or time, a determination can be made whether the dielectric layer is within acceptable tolerance.

Dependencies are inferred from the claim text.