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US 2008/0290406 A1Published application
Method for producing a vertical field effect transistor
AssigneeInfineon Technologies AG
InventorHelmut Tews
Life of this patent
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Abstract
A method for producing a field effect transistor, in which a plurality of layers are in each case deposited, planarized and etched back, in particular a gate electrode layer, is disclosed. This method allows the manufacturing of transistors having outstanding electrical properties and having outstanding reproducibility.
Claims8
-11. (canceled)
A vertical field effect transistor comprising a projection formed on a substrate for forming a channel region of a field effect transistor;
- a control electrode region of a control electrode of the field effect transistor formed on mutually opposite sides of the projection;
- an insulating region arranged between the control electrode regions and the projection electrically insulating and adjoining the channel region;
- a first connection region near the substrate at one end of the channel region;
- and
- a second connection region remote from the substrate at the other end of the channel region, the control electrode having a planar interface which lies parallel to a base area of the projection near the substrate.
2 more elements
Dependencies are inferred from the claim text.