Gate electrode for a nonvolatile memory cell

A nonvolatile memory cell comprising:

• a substrate comprising a source, a drain, and a channel between the source and the drain;
• discontinuous charge storage elements disposed within a dielectric layer overlying the substrate;
• and
• a gate electrode having a first surface adjacent to the dielectric layer and an opposing second surface,
• wherein the first surface includes a midsection between two edge portions, the two edge portions converging toward the opposing second surface.

A method of forming a nonvolatile memory cell, the method comprising:

• forming a first dielectric layer on the substrate;
• forming a localized charge storage layer on the first dielectric layer;
• forming a second dielectric layer on the localized charge storage layer;
• forming a gate electrode layer on the second dielectric layer;
• forming a gate electrode from the gate electrode layer, the gate electrode including a first surface adjacent to the second dielectric layer, wherein the first surface has a midsection and two edge portions, the midsection defining a plane and the two edge portions extending away from the plane.

A method of forming a nonvolatile memory cell, the method comprising:

• forming a first dielectric layer on the substrate;
• forming a localized charge storage layer on the first dielectric layer;
• forming a second dielectric layer on the localized charge storage layer;
• forming a gate electrode layer comprising blunted interior junctions on the second dielectric layer;
• and
• forming a gate electrode from the gate electrode layer comprising the blunted interior junctions, the gate electrode including a first surface adjacent to the second dielectric layer, wherein the first surface has a midsection and two edge portions, the midsection defining a plane and the two edge portions extending away from the plane.

A nonvolatile memory cell comprising:

• a substrate comprising a source, a drain, and a channel between the source and the drain;
• a first dielectric layer overlying the channel;
• and
• a localized charge storage layer between the first dielectric layer and a second dielectric layer;
• and
• a gate electrode adjacent to the second dielectric layer,
• wherein the substrate includes a surface adjacent to the first dielectric layer, the surface including a midsection and two edge portions, wherein the midsection defines a plane and at least one edge portion extends away from the plane.

A nonvolatile memory cell comprising:

• a substrate comprising a source, a drain, and a channel between the source and the drain;
• a first dielectric layer overlying the channel;
• a localized charge storage layer between the first dielectric layer and a second dielectric layer;
• a gate electrode adjacent to the second dielectric layer, the gate electrode comprising a first sublayer and a second sublayer on the first sublayer, wherein a width of the second sublayer is different from a width of the first sublayer.

A method of forming a nonvolatile memory cell, the method comprising:

• forming a first dielectric layer on the substrate;
• forming a localized charge storage layer on the first dielectric layer;
• forming a second dielectric layer on the localized charge storage layer;
• forming a first conductive layer on the second dielectric layer;
• forming a second conductive layer on the first conductive layer;
• forming a multilayer gate electrode from the first and second conductive layers, the multilayer gate electrode including a second sublayer on a first sublayer, the second sublayer being formed to have a width different from a width of the first sublayer.