Defect review method and device for semiconductor device
AssigneeHitachi High-Technologies Corporation
InventorToshifumi Honda
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AssigneeHitachi High-Technologies Corporation
InventorToshifumi Honda
Estimating the term…
A defect review method and device of the invention solves the previous problem of a long inspection time that is caused by the increase of a process-margin-narrow pattern as a result of the size reduction of a semiconductor device. With the method and device of the invention, an SEM (Scanning Electron Microscope) image is derived by capturing an image of a process-margin-narrow pattern portion extracted based on lithography simulation with image-capturing conditions of a relatively low resolution. The resulting SEM image is compared with CAD (Computer Aided Design) data for extraction of any abnormal section. An image of the area extracted as being abnormal is captured again, and the resulting high-resolution SEM image is compared again with the CAD data for defect classification based on the feature amount of the image, e.g., shape deformation. The abnormal section is then measured in dimension at a position preset for the classification result so that the time taken for inspection can be prevented from increasing.
A defect review method for a semiconductor device, comprising the steps of:
A defect review method for a semiconductor device, comprising the steps of:
A defect review method for a semiconductor device, comprising the steps of:
A defect review apparatus for a semiconductor device, comprising:
A defect review apparatus for a semiconductor device, comprising:
Dependencies are inferred from the claim text.