Boot-switching apparatus and method for multiprocessor and multi-memory system

A multiprocessor and multi-memory system, comprising:

• a plurality of processors;
• a plurality of memories;
• and
• a boot-switching apparatus, comprising:
• a plurality of processor enabling pins, respectively coupled to the processors, each of the processor enabling pins being suitable for setting an enabling signal to enable or disable the corresponding processor;
• a plurality of processor detection pins, respectively coupled to the processors, each of the processor detection pins being suitable for detecting the working status of the corresponding processor and obtaining a detection signal;
• a plurality of memory selection pins, coupled to the memories, suitable or setting a selection signal to switch the memories;
• and
• a timer, set with a time-out, suitable for counting down the time-out when the system is booting, wherein
• when the countdown of the time-out is completed, whether or not each of the enabling signals of the processor enabling pins matches the corresponding detection signal of the processor detection pins is determined,
• the processor is disabled through the corresponding processor enabling pin if the enabling signal does not match the detection signal,
• the memories are switched through the memory selection pins if all the enabling signals and detection signals match each other.

A boot-switching method for a multiprocessor and multi-memory system, suitable for a system having a plurality of processors and a plurality of memories, comprising:

• starting to count down a time-out when the system is booted;
• determining whether or not a timer disabling signal is received;
• detecting whether or not the processors work properly and obtaining a plurality of detection signals if the timer disabling signal is not received and the countdown of the time-out has completed;
• determining whether or not each of the detection signals matches one of a plurality of enabling signals, wherein the detection signal and the enabling signal correspond to the same processor;
• setting the enabling signal to disabling status in order to disable the processor which corresponds to the enabling signal if the detection signal does not match the enabling signal;
• and
• adjusting the selection signals sent to the memories to switch the memories if all the detection signals and enabling signals match each other.