Detecting memory-hazard conflicts during vector processing
AssigneeApple Inc.
InventorsJeffry E. Gonion, Keith E. Diefendorff
Life of this patent
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Abstract
A method for performing parallel operations in a computer system when one or more memory hazards may be present, which may be implemented by a processor, is described. During operation, the processor receives instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses. Next, the processor executes the instructions for detecting the conflict between the memory addresses and tracking the positions.
Claims28
A method for performing parallel operations in a computer system when one or more memory hazards may be present, comprising:
- receiving instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses;
- and
- executing the instructions for detecting the conflict between the memory addresses and tracking the positions.
A compiler configured to generate instructions based on a feature set of a processor, wherein the processor is configured to:
- receive instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses;
- and
- execute the instructions for detecting the conflict between the memory addresses and tracking the positions.
A computer system configured to execute instructions to avoid one or more memory hazards while performing parallel operations, comprising:
- a processor;
- a memory;
- an instruction fetch unit within the processor configured to fetch:
- instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses;
- and
- instructions for executing the instructions for detecting the conflict between the memory addresses and tracking the positions.
Dependencies are inferred from the claim text.