Methods for Fabricating Semiconductor Structures With Backside Stress Layers

A method for fabricating an semiconductor structure, the method comprising the steps of:

• providing a semiconductor substrate having a front surface and a back surface;
• fabricating a first MOS transistor and a second MOS transistor on and within the front surface of the semiconductor substrate, wherein the first MOS transistor and the second MOS transistor each comprise a channel region;
• forming overlying the first and second MOS transistors a plurality of dielectric layers comprising conductive connections that are in electrical communication with the first and second MOS transistors;
• and
• after the step of forming the plurality of dielectric layers, forming a backside stress layer on the back surface of the semiconductor substrate underlying at least one of the first and second MOS transistors.

A method for improving a performance of a semiconductor structure, the method comprising the steps of:

• providing a semiconductor structure comprising a semiconductor substrate having a semiconductor device formed on and within a front surface of the semiconductor substrate and a plurality of dielectric layers overlying the semiconductor structure, wherein the plurality of dielectric layers comprise conductive connections that are in electrical communication with the semiconductor device;
• removing a portion of the semiconductor substrate from a back surface of the semiconductor substrate;
• and
• forming a stress layer on the back surface of the semiconductor substrate underlying the semiconductor device.