Semiconductor memory
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsNorihiko Sumitani, Hidenari Kanehara
Life of this patent
Estimating the term…
Loading patent…
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsNorihiko Sumitani, Hidenari Kanehara
Estimating the term…
A semiconductor memory includes: first and second bit lines; a precharge circuit for precharging the first and second bit lines to a predetermined potential; a plurality of memory cells each connected to the first or second bit line, a selected one of the memory cells maintaining or discharging one of the precharged first and second bit lines according to a signal held by the selected memory cell; word lines for selecting the memory cells; first and second reference cells connected to the first and second bit lines, respectively, a selected one of the first and second reference cells discharging the first or second bit line connected to the selected reference cell; and first and second reference cell word lines for selecting the first and second reference cells, respectively.
A semiconductor memory, comprising:
14-16. (canceled)
Dependencies are inferred from the claim text.