Hardware and software programmable fuses for memory repair
AssigneeBroadcom Corporation
InventorsEsin Terzioglu, Gil I. Winograd
Life of this patent
Estimating the term…
Abstract
The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is unusable and should be shifted out of operation. The software programmable element includes a programmable register adapted to shift in an appropriate value indicating that at least one of the memory cells is flawed. The hardware element includes a fuse gated with the programmable register. Shifting is indicated either by software programmable fuse or hard fuse. Soft fuse registers may be chained together forming a shift register.
Claims43
1-45. (canceled)
A programmable circuit used within a device and adapted to increase manufacturing yield of the device, the programmable circuit comprising:
- at least hardware and software modes;
- the hardware mode comprising at least a hardware programmable element adapted to indicate that a faulty section within the device should be shifted out of operation;
- and
- the software mode comprising at least a software programmable element that includes a clock interface, the software programmable element being adapted to receive an appropriate value indicating that a faulty section within the device should be shifted out of operation, wherein the hardware and software modes act autonomously.
A method for increasing manufacturing yield of an array of memory cells, the method comprising:
- forming a circuit that provides access to the array of memory cells having both hardware and software modes;
- evaluating the array of memory cells in a test mode of operation;
- and
- indicating that a memory cell within the array of memory cells is unusable using only one of hardware and software modes as a result of performing the test mode of operation, wherein the software mode comprises a software programmable register that includes a clock interface, the software programmable register being adapted to receive an appropriate value indicating that a faulty memory cell within the array of memory cells should be shifted out of operation.
A method for increasing manufacturing yield of a memory device, the method comprising:
- forming a plurality of memory cells in the memory device;
- forming a programmable circuit that evaluates, in a test mode of operation, the plurality of memory cells using at least one of a hardware and software modes;
- indicating that at least one of the plurality of memory cells is unusable using only one of hardware and software modes as a result of performing the test mode of operation, the software mode comprising a software programmable element that receives an appropriate value that indicates that the at least one memory cell is unusable;
- and
- resetting the software programmable element upon power up.
Dependencies are inferred from the claim text.