High speed dual port memory without sense amplifier
AssigneeCypress Semiconductor Corporation
InventorsOnur Ozbek, Bert Sullam
Life of this patent
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Abstract
A system includes at least one word line decoder to select word lines to activate, and a memory cell array having a plurality of memory cell devices to store data received through one or more write bit lines. At least one of the memory cell devices including a memory cell to store data received over one or more write bit lines, and a sensing inversion device coupled to the memory cell and word lines. The sensing inversion device can read data stored by the memory cell and provide the read data to one or more read bit lines when at least one of the word lines is activated for read operations.
Claims20
A device comprising:
- a memory cell to store data received over one or more write bit lines;
- and
- a sensing inversion device coupled to the memory cell and word lines, the sensing inversion device to read data stored by the memory cell and provide the read data to one or more read bit lines when the word lines are activated for read operations.
A method comprising:
- receiving data stored in a memory cell at a digital sensing device;
- receiving at least one activation signal corresponding to word lines coupled to the digital sensing device;
- and
- reading the data from the memory cell responsive to the activation of the word lines.
A system comprising:
- at least one word line decoder to select word lines to activate;
- and
- a memory cell array having a plurality of memory cell devices to store data received through one or more write bit lines, the memory cell devices including sensing inversion devices to read data stored in the corresponding memory cell devices according to the activation of the selected word lines and provide an output associated with the read data to one or more read bit lines.
Dependencies are inferred from the claim text.