Semiconductor Device with Localized Stressor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRu-Shang Hsiao, Min Cao, Chung-Te Lin, Ta-Ming Kuan, Cheng-Tung Hsu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsRu-Shang Hsiao, Min Cao, Chung-Te Lin, Ta-Ming Kuan, Cheng-Tung Hsu
Estimating the term…
A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.