# US 2008/0189668 A1 · System for placing elements of semiconductor integrated circuit, method of placing elements thereon, and program for placing elements

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2008/0189668 A1
- Document ID: US20080189668A1
- Status: Published application
- Kind: A1
- Application number: 11/972,295
- Filed: 2008-01-10
- Published: 2008-08-07
- Earliest claimed: 2004-07-13
- Assignees: NEC Corporation
- Inventors: Kohei UCHIDA
- Web page: https://patentgrep.com/patent/US20080189668A1

## CPC

- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An element placement system including a placement and routing library that stores element information about logical elements to be placed, placement information containing region information of regions in which logical elements can be placed, and routing information necessary to execute routing, a placement improvement library that stores specified element information about specified logical elements being logical elements specified to place capacitors in the vicinity thereof, a placement unit that places logical elements according to input data containing connection data between logical elements and the placement information stored in the placement and routing library, a placement improvement unit that improves a result of placement by the placement unit by moving logical elements other than specified logical elements stored in the placement improvement library to collect spaces into the vicinity of the specified logical elements, a routing unit that routes logical elements after placement improvement by the placement improvement unit based on the input data, and a capacitor generation unit that places capacitors in the collected spaces.

## Claims

### Claim 1

An element placement method, comprising:
a) after placing logical elements to be mounted;
b) of logical elements, for specified logical elements previously specified to place capacitors in the vicinity thereof, moving logical elements other than said specified logical elements to collect spaces into the vicinity of the specified logical elements, said logical elements being placed in the vicinity of the specified logical elements; and
c) placing the capacitors in the collected spaces.

### Claim 2 (depends on 1)

The element placement method according to claim 1, further comprising:
b1) of logical elements, for specified logical elements previously specified to place capacitors in the vicinity thereof, moving logical elements other than said specified logical elements to not only spaces of a row area in which said specified logical elements are placed, but also spaces of other row areas, to collect spaces into the vicinity of said specified logical elements, said logical elements being placed in the vicinity of the specified logical elements.

### Claim 3 (depends on 1)

The element placement method according to claim 1, further comprising:
b2) after moving logical elements other than said specified logical elements, moving the specified logical elements to further collect spaces.

### Claim 4 (depends on 1)

The element placement method according to claim 1, further comprising:
b1) of logical elements, for said specified logical elements previously specified to place capacitors in the vicinity thereof, moving logical elements other than said specified logical elements to not only spaces of a row area in which said specified logical elements are placed, but also spaces of other row areas, to collect spaces into the vicinity of said specified logical elements, the logical elements being placed in the vicinity of the specified logical elements.

### Claim 5 (depends on 1)

A program embodied in electrical signals, said program enabling a computer to execute each step as claimed in claim 1.

### Claim 6 (depends on 3)

A program embodied in electrical signals, said program enabling a computer to execute each step as claimed in claim 3.

### Claim 7 (depends on 4)

A program embodied in electrical signals, said program enabling a computer to execute each step as claimed in claim 4.