# US 2008/0189532 A1 · Method and apparatus for precomputation and pipelined selection of branch metrics in a reduced state viterbi detector > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0189532 A1 - Document ID: US20080189532A1 - Status: Published application - Kind: A1 - Application number: 12/101,322 - Filed: 2008-04-11 - Published: 2008-08-07 - Earliest claimed: 2004-05-25 - Assignees: Agere Systems Inc. - Inventors: Erich Franz Haratsch - Web page: https://patentgrep.com/patent/US20080189532A1 ## CPC - H04L 25/03235: {with state-reduction using feedback filtering} - G11B 20/10296: {using the Viterbi algorithm} - H03M 13/41: using the Viterbi algorithm or Viterbi processors - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A method and apparatus are disclosed for improving the maximum data rate of reduced-state Viterbi detectors with local feedback. The maximum data rate that may be achieved by the disclosed reduced state Viterbi detectors is improved by precomputing a number of candidate branch metrics and performing pipelined selection of an appropriate branch metric. A reduced state Viterbi detector is thus disclosed that precomputes branch metrics for speculative sequences of one or more channel symbols; selects one of said precomputed branch metrics based on at least one decision from at least one corresponding state using at least two pipeline registers; and selects a path having a best path metric for a given state. ## Claims ### Claim 1 A signal processor for processing a signal, comprising: a branch metrics unit for precomputing branch metrics for speculative sequences of one or more channel symbols; a plurality of pipeline stages connected in series for selecting a subset of said precomputed branch metrics based on at least one decision from at least one corresponding state, wherein each of said pipeline stages comprises at least one functional unit, and wherein said functional unit comprises a pipeline register and a multiplexer; and an add-compare select unit for selecting a path having a best path metric for a given state. ### Claim 2 (depends on 1) The signal processor of claim 1, wherein an input to said functional unit comprises a subgroup of precomputed branch metrics and an output of said functional unit comprises a selected precomputed branch metric. ### Claim 3 (depends on 2) The signal processor of claim 2, wherein a plurality of said selected precomputed branch metrics ate combined into one or more new subgroups for a following stage. ### Claim 4 (depends on 3) The signal processor of claim 3, wherein said combination is based on a bit pattern of said selected precomputed branch metrics. ### Claim 5 (depends on 3) The signal processor of claim 3, wherein said combination is based on a trellis structure. ### Claim 6 (depends on 3) The signal processor of claim 3, wherein said following stage has a reduced number of subgroups than a previous stage. ### Claim 7 (depends on 1) The signal processor of claim 1, wherein said processing of said signal is performed using a reduced-state sequence estimation technique, a delayed decision-feedback sequence estimation technique, a parallel decision-feedback equalization technique, or an implementation of a Viterbi algorithm. ### Claim 8 (depends on 1) The signal processor of claim 1, wherein said processing of said signal employs a trellis that includes syndrome information for a parity check code. ### Claim 9 (depends on 1) The signal processor of claim 1, further comprising: an FIR equalizer for processing a received signal to generate an equalized received signal; and a noise-predictive FIR filter to process said equalized received signal to generate said signal, wherein channel coefficients used to precompute said branch metrics are a convolution of impulse responses of said FIR equalizer and said noise-predictive FIR filter. ### Claim 10 (depends on 1) The signal processor of claim 1, further comprising: an FIR equalizer to process a received signal to generate an equalized received signal; and a plurality of noise-predictive FIR filters to process said equalized received signal to generate a plurality of signals, wherein said step of precomputing branch metrics uses an output of one of said plurality of noise-predictive FIR filters based on characteristics of the data. ### Claim 11 (depends on 1) The signal processor of claim 1, wherein said decision is an ACS decision. ### Claim 12 (depends on 1) The signal processor of claim 1, further comprising a survivor memory for storing survivor symbols using a trace back architecture, wherein said survivor memory stores said ACS decisions as pointers, and said pointers are used to trace back a survivor path to produce the detected data. ### Claim 13 A signal processor for processing a signal, comprising: a branch metrics unit for precomputing branch metrics for speculative sequences of one or more channel symbols; a selection unit comprising at least one pipeline register for selecting one of said precomputed branch metrics based on at least one decision from at least one corresponding state; an add-compare select unit for for selecting a path having a best path metric for a given state; and a survivor memory for storing survivor symbols using a trace back architecture. ### Claim 14 (depends on 13) The signal processor of claim 13, wherein said survivor memory stores said ACS decisions as pointers, and said pointers are used to trace back a survivor path to produce the detected data.