# US 2008/0189529 A1 · Controlling instruction execution in a processing environment > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0189529 A1 - Document ID: US20080189529A1 - Status: Published application - Kind: A1 - Application number: 11/670,163 - Filed: 2007-02-01 - Published: 2008-08-07 - Earliest claimed: 2007-02-01 - Assignees: International Business Machines Corporation - Inventors: Theodore J. Bohizic; Mark H. Decker; Viktor S. Gyuris - Web page: https://patentgrep.com/patent/US20080189529A1 ## CPC - G06F 11/3672: {Test management} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Instruction execution is controlled by a single test that determines whether processing should continue in mainline processing or fall through to a test set. The single test compares a dynamically set variable to an instruction counter. If the test is met, mainline processing continues. Otherwise, processing falls through to a test set. ## Claims ### Claim 1 An article of manufacture comprising: at least one computer usable medium having computer readable program code logic to control instruction execution in a processing environment, said computer readable program code logic when executing performing the following: executing an instruction routine of an instruction stream; employing, in response to executing the instruction routine, a single test to determine whether processing is to continue to another instruction routine of the instruction stream or fall through to a test set; and executing the another instruction routine or the test set, in response to the determination. ### Claim 2 (depends on 1) The article of manufacture of claim 1, wherein the single test uses a variable in the determination that is dynamically set. ### Claim 3 (depends on 2) The article of manufacture of claim 2, wherein the variable is set to a value that depends on results of one or more tests performed to set the variable, and wherein the value is changeable during execution of the instruction stream. ### Claim 4 (depends on 2) The article of manufacture of claim 2, wherein the employing the single test comprises comparing an instruction counter of the instruction routine to a value of the variable to determine how to proceed. ### Claim 5 (depends on 1) The article of manufacture of claim 1, wherein the test set is usable by a plurality of instruction routines, and enables the plurality of instruction routines to be devoid of the test set code. ### Claim 6 (depends on 1) The article of manufacture of claim 1, wherein the test set is previously selected from a plurality of test sets. ### Claim 7 (depends on 6) The article of manufacture of claim 6, wherein the plurality of test sets comprises at least one of an instruction page boundary crossing test set, a I-PER fetch test set, an I-Step and adstop test set, a start and exit test set, and a collect statistics and decide execution mode test set. ### Claim 8 (depends on 1) The article of manufacture of claim 1, further comprising: performing evaluation of state of the processing environment; and selecting the test set based at least in part on the evaluation. ### Claim 9 (depends on 1) The article of manufacture of claim 1, wherein the instruction routine is emulating one or more instructions of a guest architecture. ### Claim 10 (depends on 1) The article of manufacture of claim 1, wherein the processing environment comprises an emulated environment, said processing environment being based on one architecture and emulating another architecture different from the one architecture. ### Claim 11 (depends on 10) The article of manufacture of claim 10, wherein the another architecture comprises the z/Architecture and the one architecture comprises a non-z/Architecture. ### Claim 12 (depends on 1) The article of manufacture of claim 1, wherein the single test is included in a decode/dispatch routine associated with the instruction routine, wherein each instruction routine of the instruction stream has a decentralized decode/dispatch routine associated therewith. ### Claim 13 (depends on 1) The article of manufacture of claim 1, wherein the another instruction routine can be the same as the executed instruction routine or different from the executed instruction routine. ### Claim 14 A method of controlling instruction execution in a processing environment, said method comprising: executing an instruction routine of an instruction stream; employing, in response to executing the instruction routine, a single test to determine whether processing is to continue to another instruction routine of the instruction stream or fall through to a test set; and executing the another instruction routine or the test set, in response to the determination. ### Claim 15 (depends on 14) The method of claim 14, wherein the employing the single test comprises comparing an instruction counter of the instruction routine to a value of a variable used by the single test to determine how to proceed. ### Claim 16 (depends on 14) The method of claim 14, wherein the test set is usable by a plurality of instruction routines, and enables the plurality of instruction routines to be devoid of the test set code. ### Claim 17 (depends on 14) The method of claim 14, further comprising: performing evaluation of state of the processing environment; and selecting the test set based at least in part on the evaluation. ### Claim 18 (depends on 14) The method of claim 14, wherein the instruction routine is emulating one or more instructions of a guest architecture. ### Claim 19 A system of controlling instruction execution in a processing environment, said system comprising: an instruction routine of an instruction stream; a routine to employ, in response to executing the instruction routine, a single test to determine whether processing is to continue to another instruction routine of the instruction stream or fall through to a test set; and a processor to execute the another instruction routine or the test set, in response to the determination. ### Claim 20 (depends on 19) The system of claim 19, wherein the another instruction routine can be the same as the executed instruction routine or different from the executed instruction routine.