# US 2008/0188017 A1 · Method of sorting dies using discrimination region

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- Number: US 2008/0188017 A1
- Document ID: US20080188017A1
- Status: Published application
- Kind: A1
- Application number: 12/012,268
- Filed: 2008-02-01
- Published: 2008-08-07
- Earliest claimed: 2007-02-02
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Young-Dae Kim; Yun-Ki Kim; Sung-Un Bae
- Web page: https://patentgrep.com/patent/US20080188017A1

## CPC

- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of sorting dies using a discrimination region includes preparing a wafer including a chip region in which a plurality of dies are disposed and an edge region in which at least one discrimination region is disposed; testing the dies to prepare a wafer map for defining the coordinates of good dies and bad dies; allowing dies defined by the wafer map to correspond to the dies of the wafer; and confirming the correctness of the correspondence between the wafer and the wafer map by checking whether the discrimination region is included in the dies defined by the wafer map.

## Claims

### Claim 1

A method of sorting dies comprising:
preparing a wafer including a chip region in which a plurality of dies are disposed and an edge region in which at least one discrimination region is disposed;
testing the dies to prepare a wafer map for defining the coordinates of good dies and bad dies;
allowing dies defined by the wafer map to correspond to the dies of the wafer; and
confirming the correctness of the correspondence between the wafer and the wafer map by determining whether the discrimination region is included in the dies defined by the wafer map.

### Claim 2 (depends on 1)

The method according to claim 1, wherein allowing the dies defined by the wafer map to correspond to the dies of the wafer comprises:
selecting a map reference die from the dies defined by the wafer map; and
selecting a wafer reference die corresponding to the map reference die from the dies of the wafer.

### Claim 3 (depends on 2)

The method according to claim 2, wherein confirming the correctness of the correspondence between the wafer and the wafer map comprises:
selecting at least one check die from the dies defined by the wafer map;
checking whether the check die corresponds with the discrimination region;
determining that the correspondence between the wafer and the wafer map is incorrect when the check die corresponds with the discrimination region; and
determining that the correspondence between the wafer and the wafer map is correct when the check die is not equal to the discrimination region.

### Claim 4 (depends on 3)

The method according to claim 3, when determining that the correspondence between the wafer and the wafer map is incorrect, further comprising:
selecting a new wafer reference die corresponding to the map reference die from the dies of the wafer; and
reconfirming the correctness of the correspondence between the wafer and the wafer map.

### Claim 5 (depends on 3)

The method according to claim 3, wherein selecting the new wafer reference die comprises:
calculating a distance of misalignment based on the coordinates of the check die and the discrimination region; and
selecting the new wafer reference die based on the calculated distance of misalignment.

### Claim 6 (depends on 3)

The method according to claim 3, wherein the dies disposed in the chip region have metal patterns, and the discrimination region is entirely covered with a metal layer to optically discriminate the discrimination region from the metal patterns,
wherein checking whether the check die corresponds with the discrimination region comprises analyzing optical properties measured at the coordinates of the check die.

### Claim 7 (depends on 3)

The method according to claim 3, wherein the wafer has a direction indicator for displaying the direction of the wafer,
the dies of the wafer are 2-dimensionally arranged in the chip region such that the positions of the dies are defined by x-y coordinates,
and the coordinates of the dies of the wafer are defined on the basis of the direction indicator.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the map reference die is selected from the dies adjacent to both the direction indicator and the discrimination region.

### Claim 9 (depends on 7)

The method according to claim 7, wherein the check die is selected from the dies disposed on an edge of the chip region.

### Claim 10 (depends on 9)

The method according to claim 9, wherein the check die includes at least one selected from dies having the smallest x coordinate, dies having the largest x coordinate, dies having the largest y coordinate, and dies having the smallest y coordinate.

### Claim 11 (depends on 10)

The method according to claim 10, wherein the check die includes at least one selected from a die having the largest y coordinate of the dies having the smallest x coordinate, a die having the smallest y coordinate of the dies having the smallest x coordinate, a die having the largest y coordinate of the dies having the largest x coordinate, a die having the smallest y coordinate of the dies having the largest x coordinate, a die having the smallest x coordinate of the dies having the largest y coordinate, a die having the largest x coordinate of the dies having the largest y coordinate, a die having the smallest x coordinate of the dies having the smallest y coordinate, and a die having the largest x coordinate of the dies having the smallest y coordinate.

### Claim 12 (depends on 10)

The method according to claim 10, wherein the discrimination region is disposed in an edge region of the wafer adjacent to the check die.