# US 2008/0186672 A1 · Method Of Latent Fault Checking A Cooling Module

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- Number: US 2008/0186672 A1
- Document ID: US20080186672A1
- Status: Published application
- Kind: A1
- Application number: 12/099,358
- Filed: 2008-04-08
- Published: 2008-08-07
- Earliest claimed: 2006-01-20
- Assignees: Emerson Network Power - Embedded Computing, Inc.
- Inventors: Mark S. Lanus
- Web page: https://patentgrep.com/patent/US20080186672A1

## CPC

- G06F 11/3058: {Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206)}
- G06F 11/3044: {where the computing system component is the mechanical casing of the computing system}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A computer system includes a cooling module that cools an embedded computer chassis. The cooling module includes a fan and a fan controller that controls the fan speed based on a first signal that represents a desired speed of the fan. A bus master module generates the first signal, generates a second signal that bypasses the fan controller and selectively switches the fan to a full-speed, receives a third signal that indicates an actual speed of the fan, communicates the second signal to switch the fan to full-speed, monitors the third signal to determine if the fan speed changed due to the second signal, and indicates a latent fault if the change in the fan speed is not detected.

## Claims

### Claim 1

A computer system, comprising:
a cooling module that cools an embedded computer chassis, comprising:
a fan; and
a fan controller that controls the fan speed based on a first signal that represents a desired speed of the fan; and
a bus master module that generates the first signal, that generates a second signal that bypasses the fan controller and selectively switches the fan to a full-speed, that receives a third signal that indicates an actual speed of the fan, that communicates the second signal to switch the fan to full-speed, that monitors the third signal to determine if the fan speed changed due to the second signal, and that indicates a latent fault if the change in the fan speed is not detected.

### Claim 2 (depends on 1)

The computer system of claim 1 wherein the bus master module selectively generates the first signal to change the fan speed, monitors the third signal to determine if the fan speed changed due to the first signal, and indicates the latent fault if the change in the fan speed is not detected.

### Claim 3 (depends on 1)

The computer system of claim 1 wherein the bus master module demands an increase of fan speed via the first signal, monitors the third signal to determine if the fan speed increased due to the first signal, demands a decrease of the fan speed via the first signal, monitors the third signal to determine if the fan speed decreased due to the first signal, and indicates the latent fault if at least one of the increase and decrease of the fan speeds is not detected.

### Claim 4 (depends on 1)

The computer system of claim 1 further comprising an Intelligent Platform Management Bus (IPMB) that carries the second and third signals.

### Claim 5 (depends on 1)

The embedded computer chassis of claim 1 wherein the bus master module monitors the third signal to determine if the fan speed increased due to the second signal and then relinquishes the second signal, monitors the third signal to determine if the fan speed decreased due to relinquishing the second signal, and indicates the latent fault if at least one of the increase and decrease in the fan speeds is not detected.

### Claim 6 (depends on 1)

The embedded computer chassis of claim 1 further comprising a fan tachometer that generates the third signal based on a rotational speed of the fan.

### Claim 7 (depends on 1)

The embedded computer chassis of claim 1, wherein the bus module indicates the latent fault via an alarm signal.

### Claim 8

A method of performing a full-speed latent fault check on a fan controller, comprising:
a full-speed latent fault checking algorithm, comprising:
communicating a first signal to modify a fan speed via a full speed fan control circuit that bypasses a fan controller module; and
determining if the change in the fan speed is detected due to the first signal; and
if the change in the fan speed is not detected in the full-speed latent fault checking algorithm, then indicating a latent fault.

### Claim 9 (depends on 8)

The method of claim 8, further comprising a fan controller latent fault checking algorithm, comprising:
communicating a second signal to modify the fan speed via the fan controller module;
determining if a change in the fan speed is detected due to the second signal; and
if the change in the fan speed is not detected in the fan controller latent fault checking algorithm, then indicating the latent fault.

### Claim 10 (depends on 8)

The method of claim 8, the fan controller latent fault checking algorithm further comprising:
requesting an increased fan speed via the second signal;
determining if an increase in the fan speed is detected;
requesting a decreased fan speed via the second signal;
determining if a decrease in the fan speed is detected; and
if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, then indicating the latent fault.

### Claim 11 (depends on 8)

The method of claim 8, the full-speed latent fault checking algorithm further comprising:
communicating a full-speed signal, bypassing the fan controller module;
determining if an increase in the fan speed is detected;
removing the full-speed signal, bypassing the fan controller module;
determining if a decrease in the fan speed is detected; and
if at least one of the increase in the fan speed and the decrease in the fan speed are not detected, indicating the latent fault in the cooling module of the embedded computer chassis.

### Claim 12 (depends on 8)

The method of claim 8, wherein indicating a latent fault comprises generating an alarm signal in a computer.
