# US 2008/0186085 A1 · On-chip electrically alterable resistor

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- Number: US 2008/0186085 A1
- Document ID: US20080186085A1
- Status: Published application
- Kind: A1
- Application number: 12/060,893
- Filed: 2008-04-02
- Published: 2008-08-07
- Earliest claimed: 2004-11-23
- Assignees: International Business Machines Corporation
- Inventors: Louis C. Hsu; Brian L. Ji; Chung H. Lam
- Web page: https://patentgrep.com/patent/US20080186085A1

## CPC

- H03H 11/24: Frequency-independent attenuators
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

A programmable, electrically alterable (EA) resistor, an integrated circuit (IC) chip including the EA resistor and integrated analog circuits using on-chip EA resistors. Phase change storage media form resistors (EA resistors) on an IC that may be formed in an array of parallel EA resistors to set variable circuit bias conditions for circuits on the IC and in particular, bias on-chip analog circuits. The bias resistance is changed by changing EA resistor phase. Parallel connection of the parallel EA resistors may be dynamically alterable, switching one or more parallel resistors in and out digitally.

## Claims

### Claim at position 1

1-17. (canceled)

### Claim 18 (depends on 17)

A CMOS IC as in claim 17, further comprising:
an operational amplifier (op-amp), a reference voltage connected to a first op-amp input and said dynamically variable resistor connected to a second op-amp input;
a first PFET gated by an output of said op-amp, a drain of said PFET connected to said common resistive load line;
a second PFET connected gate to drain to the source of said first PFET; and
a third PFET having its gate connected to the gate of said second PFET, the drain of said third PFET being the output of said current source;
whereby resistance of said dynamically variable resistor is tuned both by switching phases on individual chalcogenide resistors and individually switching said four bit select, said two bit select and said resistance adjust on fourth of said four.

### Claim 19

A CMOS IC chip including a current source, said current source comprising:
an on-chip electrically alterable (EA) resistor;
an operational amplifier (op-amp), a reference voltage connected to a first op-amp input and said on-chip EA resistor connected to a second op-amp input;
a first PFET gated by an output of said op-amp, a drain of said PFET connected to said on-chip EA resistor;
a second PFET connected gate to drain to the source of said first PFET; and a third PFET having its gate connected to the gate of said second PFET, the drain of said third PFET being the output of said current source.

### Claim 20 (depends on 19)

A CMOS IC as in claim 19, said on-chip EA resistor including one or more programmable resistors, each of said programmable resistors comprising:
a first NFET, the drain of said first NFET connected to a selectable program-supply line;
a program select connected to the gate of said first NFET;
a second NFET, the drain of said second NFET coupled to said second op-amp input;
a resistor select connected to the gate of said second NFET; and
a phase change resistor connected to the source of said first NFET and the source of said second NFET, the drain of one said second NFET being connected to said second op-amp input.

### Claim 21 (depends on 20)

A CMOS IC as in claim 20, wherein said phase change resistor is a chalcogenide resistor, said source of said first NFET and said second NFET are connected together and to one end of said chalcogenide resistor and an other end of said chalcogenide resistor is connected to ground.

### Claim 22 (depends on 21)

A CMOS IC as in claim 21, wherein said on-chip EA resistor includes four pair of said programmable resistors connected to a common said selectable program-supply line and a common said resistive load line, the drain of another said second NFET in each of said pair being connected to the source of the one said second NFET, a four bit select being connected to said resistor select and said resistance adjust on two of said four pair, a two bit select is connected to said resistor select and said resistance adjust on a third of said four pair and, said resistance adjust is grounded on a fourth of said four pair.

### Claim 23 (depends on 22)

A CMOS IC as in claim 22, wherein said phase change resistor is a chalcogenide resistor, resistance of EA resistor being tuned both by switching phases on individual chalcogenide resistors and individually switching said four bit select, said two bit select and said resistance adjust on said fourth of said four pair.