# US 2008/0185706 A1 · Package and method for making the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0185706 A1 - Document ID: US20080185706A1 - Status: Published application - Kind: A1 - Application number: 12/021,487 - Filed: 2008-01-29 - Published: 2008-08-07 - Earliest claimed: 2007-02-01 - Assignees: Advanced Semiconductor Engineering, Inc. - Inventors: Meng-Jen Wang - Web page: https://patentgrep.com/patent/US20080185706A1 ## CPC - B81C 1/00269: {Bonding of solid lids or wafers to the substrate} - B81C 1/00301: {Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias} - H10D 62/117: {Shapes of semiconductor bodies} - H10W 72/30: Die-attach connectors - H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - B81B 2207/097: Interconnects arranged on the substrate or the lid, and covered by the package seal - B81C 2203/019: characterised by the material or arrangement of seals between parts - H10W 72/01308: {using permanent auxiliary members, e.g. using alignment marks} - H10W 72/07234: {Using a reflow oven} - H10W 72/07236: {Soldering or alloying} - H10W 72/07311: {Treating the bonding area before connecting, e.g. by applying flux or cleaning} - H10W 72/856: {Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15)} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00) ## Abstract The present invention relates to a package and a method for making the same. The package includes a substrate, a semiconductor element, and an underfill. The semiconductor element has a first surface. A plurality of bumps and at least one ring structure are disposed on the first surface, in which the bumps are outside the ring structure. The semiconductor element is disposed on the substrate through the bumps and the ring structure. The ring structure of the semiconductor element and the substrate define a closed space. The bumps electrically connect the substrate and the semiconductor element. The underfill is filled between the substrate and the semiconductor element, covering the bumps and out of the ring structure. Since the package of the present invention has the closed space, the package is not only applicable for a common flip chip package, but also for micro electro-mechanical systems (MEMS) having movable elements. In addition, a wire bonding process is not needed for the package, such that the packaging steps can be simplified so as to reduce the packaging time and the production cost. ## Claims ### Claim 1 A package, comprising: a substrate; a semiconductor element, having a first surface, wherein a plurality of bumps and at least one ring structure are disposed on the first surface, and the bumps are outside the ring structure; the semiconductor element is disposed on the substrate through the bumps and the ring structure; the ring structure of the semiconductor element and the substrate define a closed space; the bumps electrically connect the substrate and the semiconductor element; and an underfill, filled between the substrate and the semiconductor element, covering the bumps and out of the ring structure. ### Claim 2 (depends on 1) The package according to claim 1, wherein the substrate is a circuit board. ### Claim 3 (depends on 1) The package according to claim 1, wherein the semiconductor element is a chip. ### Claim 4 (depends on 3) The package according to claim 3, wherein the chip is an integrated circuit (IC) chip. ### Claim 5 (depends on 4) The package according to claim 4, wherein the IC element is an application specific IC chip. ### Claim 6 (depends on 1) The package according to claim 1, further comprising at least one movable element disposed on the first surface of the semiconductor element, and located in the closed space. ### Claim 7 (depends on 1) The package according to claim 1, wherein the semiconductor element is a micro electro-mechanical systems (MEMS) element. ### Claim 8 (depends on 7) The package according to claim 7, wherein the MEMS element is an optical element. ### Claim 9 (depends on 7) The package according to claim 7, wherein the MEMS element is an MEMS microphone element. ### Claim 10 (depends on 7) The package according to claim 7, wherein the semiconductor element has a diaphragm located on the closed space. ### Claim 11 (depends on 1) The package according to claim 1, wherein the material of the ring structure is a weldable material. ### Claim 12 (depends on 11) The package according to claim 11, wherein the material of the ring structure is tin. ### Claim 13 A method of making a package, comprising the steps of: (a) providing a substrate; (b) providing a semiconductor element having a first surface, wherein a plurality of bumps and at least one ring structure are disposed on the first surface, and the bumps are outside the ring structure; (c) disposing the semiconductor element on the substrate, wherein the ring structure of the semiconductor element and the substrate define a closed space, and the bumps electrically connect the substrate and the semiconductor element; and (d) filling an underfill between the substrate and the semiconductor element, wherein the underfill covers the bumps and is out of the ring structure. ### Claim 14 (depends on 13) The method according to claim 13, wherein in Step (c), the bumps electrically connect the substrate and the semiconductor element by utilizing a reflow process, and the ring structure is welded to the substrate and the semiconductor element. ### Claim 15 (depends on 14) The method according to claim 14, wherein a material of the ring structure is tin.