# US 2008/0185686 A1 · Electronic device with connection bumps > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0185686 A1 - Document ID: US20080185686A1 - Status: Published application - Kind: A1 - Application number: 11/671,048 - Filed: 2007-02-05 - Published: 2008-08-07 - Earliest claimed: 2007-02-05 - Assignees: Freescale Semiconductor, Inc. - Inventors: Radu M. Secareanu; Suman K. Banerjee; Olin L. Hartin; Sandra J. Wipf - Web page: https://patentgrep.com/patent/US20080185686A1 ## CPC - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting} - H10W 72/248: {Top-view layouts, e.g. mirror arrays} - H10W 72/251: {Materials} - H10W 72/265: {Providing thermal transfer, e.g. thermal bumps} - H10W 72/267: {Multiple bump connectors having different functions} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Flip-chip electronic devices (40, 70, 80, 90) employ bumps (42, 72, 82) for coupling to an external substrate. Device cells (43, 73, 83, 93) and bumps (42, 72, 82) are preferably arranged in clusters (46) where four bumps (42, 72, 82) substantially surround each device cell (43, 73, 83, 93) or form a cross with the device cell (43, 73, 83, 93) at the intersection of the cross. The bumps (42, 72, 82) are desirably spaced apart by the minimum allowable bump (42, 72, 82) pitch (Lm). Typically, each device cell (43, 73, 83, 93) contains one or more active device regions (44, 74, 86, 96) depending on the overall function. Complex devices (40, 70) are formed by an X-Y array of the clusters (46), where adjacent clusters (46) may share bumps (43, 73, 83, 93) and/or device cells (43, 73, 83, 93). In a preferred embodiment, the bumps (42, 82) form the outer perimeter (48) of the device (40, 80, 90). The maximum device temperature and overall noise is reduced. ## Claims ### Claim 1 A flip-chip electronic device, comprising: multiple device cells having one or more active elements therein; multiple bumps adapted to thermally couple the device cells to an external substrate; and wherein the bumps and device cells are arranged so that four bumps substantially form a compact cluster around each device cell and the device comprises an X-Y array of such clusters. ### Claim 2 (depends on 1) The device of claim 1. wherein sharing of bumps or device cells between some adjacent clusters is allowed. ### Claim 3 (depends on 1) The device of claim 1, wherein the bumps are spaced apart at least by the minimum allowed bump pitch. ### Claim 4 (depends on 1) The device of claim 1, wherein an outer perimeter of the device is formed by bumps spaced-apart by a minimum allowed bump pitch. ### Claim 5 (depends on 1) The device of claim 1, wherein the cluster has diagonals and a principal direction of the cells is aligned with one of the diagonals. ### Claim 6 (depends on 1) The device of claim 1, wherein the bumps and device cells are arranged in clusters wherein the four bumps substantially form a cross with the four bumps at ends of arms of the cross and with the device cell at the intersection of the arms of the cross and wherein a principal direction of the device cell is aligned with one of the arms of the cross. ### Claim 7 (depends on 1) The device of claim 1, wherein the clusters are substantially square. ### Claim 8 An electronic device, comprising: an array of device cells; and an array of bumps disposed so that four bumps surround each device cell in substantially equal thermal communication with the surrounded device cell. ### Claim 9 (depends on 8) The device of claim 8, wherein the four bumps are arranged so that lines drawn between pairs of bumps form arms of a cross and the device cell is located at the intersection of the arms of the cross. ### Claim 10 (depends on 9) The device of claim 9, wherein the device cells comprise multiple active elements. ### Claim 11 (depends on 10) The device of claim 10, wherein at least some of the device cells comprise at least two active elements and at least two ballast resistors, whose long dimensions are aligned parallel to a first arm of the cross. ### Claim 12 (depends on 11) The device of claim 11, wherein the at least two active elements are located closer to bumps on the second arm of the cross than the ballast resistors. ### Claim 13 An electronic device, comprising: multiple device cells, each device cell having an axis; multiple bumps disposed so that each device cell has first and second bumps thermally disposed on opposite sides of the device cell substantially on the axis thereof, thereby forming a cluster; and wherein at least a portion of the device comprises a parallel array of adjacent clusters, staggered so that a bump of one cluster is disposed next to a device cell of an adjacent cluster. ### Claim 14 (depends on 13) The device of claim 13, wherein the bumps of each cluster are separated by at least the minimum allowed bump spacing. ### Claim 15 (depends on 13) The device of claim 13, wherein the clusters are arranged so that bumps form an exterior perimeter of the device. ### Claim 16 (depends on 13) The device of claim 13, wherein the clusters are arranged so that the bumps form an exterior boundary of the device on at least two sides thereof. ### Claim 17 (depends on 13) The device of claim 13, wherein the parallel array of such clusters with a bump of one cluster disposed next to a device cell of an adjacent cluster has bumps of adjacent clusters substantially equally spaced. ### Claim 18 (depends on 13) The device of claim 13, wherein clusters are serially arranged along a common axis to form lines of cluster arranged adjacent to each other but longitudinally displaced by approximately one-third the length of the cluster. ### Claim 19 (depends on 18) The device of claim 18, wherein a perimeter of the device is formed by bumps on at least two sides thereof. ### Claim 20 (depends on 13) The device of claim 13, wherein at least some of the multiple device cells comprise two active regions and two ballast resistors, wherein the two active regions are located closer to the bumps of the cluster than the ballast resistors.