# US 2008/0185681 A1 · Integrated Circuit Comprising a Capacitor with Metal Electrodes and Process for Fabricating Such a Capacitor

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- Number: US 2008/0185681 A1
- Document ID: US20080185681A1
- Status: Published application
- Kind: A1
- Application number: 11/570,731
- Filed: 2005-06-07
- Published: 2008-08-07
- Earliest claimed: 2004-06-18
- Assignees: STMicroelectronics S.r.l.; Koninklijke Philips Electronics N.V.
- Inventors: Aomar Halimaoui; Rebha El Farhane; Benoit Froment
- Web page: https://patentgrep.com/patent/US20080185681A1

## CPC

- H10D 1/712: {being rough surfaces, e.g. using hemispherical grains}
- H10D 1/716: {having vertical extensions}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An integrated circuit (IC) includes at least one capacitor with metal electrodes. At least one of the electrodes (10 or 30) is formed from at least surface-silicided hemispherical grain silicon or silicon alloy. A fabrication process for obtaining such a capacitor with silicided metal electrodes is also provided.

## Claims

### Claim at position 1

1-9. (canceled)

### Claim 10

An integrated circuit comprising at least one capacitor with a plurality of metal electrodes, wherein at least one electrode of the plurality of electrodes of the capacitor is formed from at least surface-silicided hemispherical grain silicon or silicon alloy.

### Claim 11 (depends on 10)

The integrated circuit according to claim 10, in which a second electrode of the capacitor is formed from at least surface-silicided hemispherical grain silicon or silicon alloy.

### Claim 12 (depends on 11)

The integrated circuit according to claim 11, in which the second electrode of the capacitor is entirely formed from a metal silicide.

### Claim 13 (depends on 10)

The integrated circuit according to claim 10, in which a second electrode of the capacitor comprises a metal layer.

### Claim 14 (depends on 10)

The integrated circuit according to claim 10, in which the at least one electrode is entirely formed from a metal silicide.

### Claim 15 (depends on 14)

The integrated circuit according to claim 14, in which a second electrode of the capacitor is formed from at least surface-silicided hemispherical grain silicon or silicon alloy.

### Claim 16 (depends on 15)

The integrated circuit according to claim 15, in which the second electrode of the capacitor is entirely formed from a metal silicide.

### Claim 17 (depends on 14)

The integrated circuit according to claim 14, in which a second electrode of the capacitor comprises a metal layer.

### Claim 18

A process for fabricating a capacitor within an integrated circuit, comprising:
the production of a first electrode, of a dielectric and of a second electrode, wherein the production of the first electrode comprises the formation of a layer of hemispherical grain silicon or silicon alloy and the at least surface silicidization of the layer.

### Claim 19 (depends on 18)

The process according to claim 18, in which the production of the second electrode is similar to that of the first electrode.

### Claim 20 (depends on 18)

The process according to claim 18, in which the production of the second electrode comprises a deposition of metal.

### Claim 21 (depends on 18)

The process according to claim 18, in which the layer of hemispherical grain silicon or silicon alloy is completely silicided.

### Claim 22 (depends on 21)

The process according to claim 21, in which the production of the second electrode is similar to that of the first electrode.

### Claim 23 (depends on 21)

The process according to claim 21, in which the production of the second electrode comprises a deposition of metal.

### Claim 24

An electronic device, comprising:
a plurality of integrated circuits, each of the integrated circuits comprising:
at least one capacitor with a plurality of metal electrodes, wherein
first and second electrodes of the plurality of electrodes of the capacitor are formed from at least surface-silicided hemispherical grain silicon or silicon alloy.