# US 2008/0185678 A1 · Semiconductor device and method of manufacturing the same

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- Number: US 2008/0185678 A1
- Document ID: US20080185678A1
- Status: Published application
- Kind: A1
- Application number: 12/027,620
- Filed: 2008-02-07
- Published: 2008-08-07
- Earliest claimed: 2007-02-07
- Assignees: Seiko Instruments Inc.
- Inventors: Yuichiro Kitajima
- Web page: https://patentgrep.com/patent/US20080185678A1

## CPC

- H10D 1/47: Resistors having no potential barriers
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A fuse element is laminated on a resistor and the resistor is formed in a concave shape below a region in which cutting of the fuse element is carried out with a laser. Accordingly, there can be provided a semiconductor device which occupies a small area, causes no damage on the resistor in the cutting of the fuse element, has a small contact resistance occurred between elements, and has stable characteristics, and a method of manufacturing the same.

## Claims

### Claim 1

A semiconductor device, comprising:
a semiconductor substrate having a main surface;
a trench region formed in the main surface of the semiconductor substrate;
an insulating layer covering an inner surface of the trench region and the main surface of the semiconductor substrate;
a resistor formed on the insulating layer so as to extend from within the trench region onto the main surface of the semiconductor substrate;
a first oxide film embedded in the trench region so as to be flush with the main surface of the semiconductor substrate;
a fuse element formed on the first oxide film so as to overlie the resistor;
a second oxide film formed so as to cover the fuse element, the first oxide film, and the resistor; and
a interconnect layer formed on the second oxide film to be electrically connected with the resistor and the fuse element via a plug.

### Claim 2 (depends on 1)

A semiconductor device according to claim 1, wherein the resistor is formed of a first polycrystalline silicon film.

### Claim 3 (depends on 1)

A semiconductor device according to claim 1, wherein the fuse element is formed of a second polycrystalline silicon film.

### Claim 4

A method of manufacturing a semiconductor device having resistors and fuse elements and including a bleeder resistance circuit which can, by cutting one of the fuse elements connected in parallel with one of the resistors, adjust voltage output divided by the resistors, the method comprising the steps of:
forming a trench in a semiconductor substrate;
forming a field insulating film on the semiconductor substrate having the trench formed therein;
forming a first polycrystalline silicon film on the field insulating film;
patterning the first polycrystalline silicon film;
depositing and planarizing using an etch-back method a first oxide film;
forming a second polycrystalline silicon film;
patterning the second polycrystalline silicon film;
forming an interlayer film on the second polycrystalline silicon film;
forming a plug in a region where the first polycrystalline silicon film and the second polycrystalline silicon film are laminated so that the plug pierces the interlayer film and the second polycrystalline silicon film to reach the first polycrystalline silicon film;
forming thereon a conductor as a interconnect layer;
forming thereon a passivation film;
forming thereon a polyimide film; and
patterning the passivation film and the polyimide film.

### Claim 5 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of forming a first polycrystalline silicon film comprises forming the first polycrystalline silicon film at a thickness ranging from 100 nm to 400 nm.

### Claim 6 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of forming a second polycrystalline silicon film comprises forming the second polycrystalline silicon film at a thickness ranging from 200 nm to 400 nm.

### Claim 7 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of forming a first polycrystalline silicon film comprises introducing an impurity into the first polycrystalline silicon film with a dose ranging from 1×1014/cm2 to 5×1015/cm2.

### Claim 8 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of forming a second polycrystalline silicon film comprises introducing an impurity into the second polycrystalline silicon film with a dose of at least 5×1015/cm2.

### Claim 9 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of forming a trench in a semiconductor substrate comprises forming the trench to a depth ranging from 500 nm to 2,000 nm.

### Claim 10 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the step of depositing and planarizing using an etch-back method a first oxide film comprises forming the first oxide film at a thickness approximately equal to or larger than the depth to which the trench is formed.

### Claim 11 (depends on 4)

A method of manufacturing a semiconductor device according to claim 4, wherein the first oxide film comprises an oxide film formed of a TEOS-based oxide film and an SOG film.

### Claim 12 (depends on 1)

A semiconductor device comprising:
at least two resistors, each of the at least two resistors being connected in parallel with a fuse element; and
a bleeder resistance circuit which can, by cutting the fuse element, adjust voltage output divided by the at least two resistors,
wherein each of the at least two resistors and the fuse element are connected in parallel to form the semiconductor device according to claim 1.