# US 2008/0185677 A1 · Low-voltage organic thin film transistor and fabrication method thereof

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- Number: US 2008/0185677 A1
- Document ID: US20080185677A1
- Status: Published application
- Kind: A1
- Application number: 11/696,805
- Filed: 2007-04-05
- Published: 2008-08-07
- Earliest claimed: 2007-02-06
- Assignees: Dong-A University Research Foundation for Industry-Academy Cooperation
- Inventors: Jae Woo Yang; Chung Kun Song; Kang Dae Kim; Gi Seong Ryu; Yong Xian Xu; Myung Won Lee
- Web page: https://patentgrep.com/patent/US20080185677A1

## CPC

- H10K 10/84: Ohmic electrodes, e.g. source or drain electrodes
- H10K 10/472: {the gate dielectric comprising only inorganic materials}
- H10K 85/40: Organosilicon compounds, e.g. TIPS pentacene
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

The present invention provides an organic thin film transistor (OTFT) being operatable at a low-voltage. The OTFT has a gate dielectric layer of ultra-thin metal oxide or a dual gate dielectric layer of metal oxide and organic dielectric. The metal oxide layer is self-grown to a thickness lower than 10 nm by direct oxidation of a metal gate electrode in O2 plasma process at a temperature lower than 100° C. The gate electrode is deposited with pattern on a plastic or glass substrate. An organic semiconductor layer is deposited on the gate dielectric layer, and source/drain electrodes are formed thereon. In case the dual gate dielectric layer is used, the source/drain electrodes can be disposed under the organic semiconductor layer to realize a bottom contact structure.

## Claims

### Claim 1

A method of fabricating an organic thin film transistor, the method comprising:
forming a gate electrode by depositing metal on a substrate;
forming a gate dielectric layer on surfaces of the gate electrode by self-growing a metal oxide layer to a thickness lower than 10 nm through direct oxidation of the gate electrode in O2 plasma process at a low temperature lower than 100° C.;
depositing an organic semiconductor layer on the gate dielectric layer; and
forming source/drain electrodes on the organic semiconductor layer such that the source/drain electrodes are spaced apart from each other.

### Claim 2 (depends on 1)

The method of claim 1, wherein the forming of the gate electrode and the forming of the gate dielectric layer are in-situ performed.

### Claim 3 (depends on 2)

The method of claim 2, wherein the depositing of the metal for the gate electrode is performed using a shadow mask with pattern.

### Claim 4 (depends on 1)

The method of claim 1, wherein the forming of the gate dielectric layer includes forming an organic dielectric layer on the metal oxide layer.

### Claim 5 (depends on 4)

The method of claim 4, wherein the organic dielectric layer is a self-assembled organic molecular monolayer.

### Claim 6 (depends on 4)

The method of claim 4, wherein the organic dielectric layer is a spin-coated organic layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein the substrate is made of plastic or glass.

### Claim 8

A method of fabricating an organic thin film transistor, the method comprising:
forming a gate electrode by depositing metal on a substrate;
forming a dual gate dielectric layer on surfaces of the gate electrode, the forming of the dual gate dielectric layer including self-growing a metal oxide layer to a thickness lower than 10 nm through direct oxidation of the gate electrode in O2 plasma process at a low temperature lower than 100° C. and forming an organic dielectric layer on the metal oxide layer;
forming source/drain electrodes on the dual gate dielectric layer such that the source/drain electrodes are spaced apart from each other; and
depositing an organic semiconductor layer to cover the source/drain electrodes.

### Claim 9 (depends on 8)

The method of claim 8, wherein the depositing of the metal for the gate electrode and the self-growing of the metal oxide layer for the gate dielectric layer are in-situ performed.

### Claim 10 (depends on 9)

The method of claim 9, wherein the depositing of the metal for the gate electrode is performed using a shadow mask with pattern.

### Claim 11 (depends on 8)

The method of claim 8, wherein the organic dielectric layer is a self-assembled organic molecular monolayer.

### Claim 12 (depends on 8)

The method of claim 8, wherein the organic dielectric layer is a spin-coated organic layer.

### Claim 13 (depends on 8)

The method of claim 8, wherein the substrate is made of plastic or glass.

### Claim 14

An organic thin film transistor comprising:
a substrate;
a gate electrode formed of a patterned metal on the substrate;
a gate dielectric layer self-grown on the gate electrode in O2 plasma process at a low temperature lower than 100° C., the gate dielectric layer having a thickness lower than 10 nm;
an organic semiconductor layer formed on the gate dielectric layer; and
source/drain electrodes formed on the organic semiconductor layer, the source/drain electrodes being spaced apart from each other.

### Claim 15

An organic thin film transistor comprising:
a substrate;
a gate electrode formed of a patterned metal on the substrate;
a dual gate dielectric layer including a metal oxide layer and an organic dielectric layer, the metal oxide layer being self-grown on the gate electrode in O2 plasma process at a low temperature lower than 100° C. and having a thickness lower than 10 nm, and the organic dielectric layer being formed on the metal oxide layer;
an organic semiconductor layer formed on the dual gate dielectric layer; and
source/drain electrodes formed on the organic semiconductor layer, the source/drain electrodes being spaced apart from each other.

### Claim 16

An organic thin film transistor comprising:
a substrate;
a gate electrode formed of a patterned metal on the substrate;
a dual gate dielectric layer including a metal oxide layer and an organic dielectric layer, the metal oxide layer being self-grown on the gate electrode in O2 plasma process at a low temperature lower than 100° C. and having a thickness lower than 10 nm, and the organic dielectric layer being formed on the metal oxide layer;
source/drain electrodes formed on the dual gate dielectric layer, the source/drain electrodes being spaced apart from each other; and
an organic semiconductor layer formed on the source/drain electrodes.