# US 2008/0185651 A1 · SOI type semiconductor device having a protection circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0185651 A1 - Document ID: US20080185651A1 - Status: Published application - Kind: A1 - Application number: 12/007,318 - Filed: 2008-01-09 - Published: 2008-08-07 - Earliest claimed: 2007-02-01 - Assignees: Oki Electric Industry Co., Ltd. - Inventors: Masao Okihara - Web page: https://patentgrep.com/patent/US20080185651A1 ## CPC - H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)} - H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence) - H10D 89/811: {using FETs as protective elements} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An SOI type semiconductor device having a silicon substrate and a buried oxide layer formed on the silicon substrate includes an internal circuit formed in a first region having at least one FD type transistor having a SOI structure, the internal circuit performing a function of the semiconductor device and a protection circuit formed in a second region having at least one PD type transistor having a SOI structure, the protection circuit protecting the internal circuit from electro static damage. ## Claims ### Claim 1 A Silicon-On-Insulator type semiconductor device having a silicon substrate and a buried oxide layer formed on the silicon substrate, comprising: an internal circuit formed in a first region having at least one Fully-Depletion type transistor having a Silicon-On-Insulator structure, the internal circuit performing a function of the semiconductor device; and a protection circuit formed in a second region having at least one Partially-Depletion type transistor having the Silicon-On-Insulator structure, the protection circuit protecting the internal circuit from electro static damage. ### Claim 2 (depends on 1) A Silicon-On-Insulator type semiconductor device as claimed in claim 1, wherein the Partially-Depletion type transistor includes a lightly doped body region surrounded by its gate, its source, its drain and the buried oxide layer, and the body region includes a highly doped region at its bottom, which is adjacent to the buried oxide layer. ### Claim 3 (depends on 2) A Silicon-On-Insulator type semiconductor device as claimed in claim 2, wherein the lightly doped body region of the Partially-Depletion type transistor is a first lightly doped body region having a first thickness, wherein the Fully-Depletion type transistor includes a second lightly doped body region having a second thickness surrounded by its gate, its source, its drain and the buried oxide layer, and wherein the first and the second thicknesses are the substantially the same. ### Claim 4 (depends on 2) A Silicon-On-Insulator type semiconductor device as claimed in claim 2, wherein the Partially-Depletion type transistor includes an LDD region. ### Claim 5 (depends on 2) A Silicon-On-Insulator type semiconductor device as claimed in claim 2, wherein the Partially-Depletion type transistor is a first Partially-Depletion type transistor of a certain conductivity type, the protection circuit further comparing: a second Partially-Depletion type transistor of the same conductivity type of the first Partially-Depletion type transistor, wherein the gates of the first and second Partially-Depletion type transistors and the drain of the first Partially-Depletion type transistor are commonly connected to a first power supply voltage, the source of the first Partially-Depletion type transistor and the drain of the second Partially-Depletion type transistor are connected to each other via a node, which is connected to the internal circuit, and the source of the second Partially-Depletion type transistor is connected to the second power supply voltage. ### Claim 6 (depends on 1) A Silicon-On-Insulator type semiconductor device as claimed in claim 1, wherein the Partially-Depletion type transistor includes a first body region surrounded by its gate, its source, its drain and the buried oxide layer, the Fully-Depletion type transistor includes a second body region surrounded by its gate, its source, its drain and the buried oxide layer, and wherein the first body region is thicker than the second body region. ### Claim 7 (depends on 6) A Silicon-On-Insulator type semiconductor device as claimed in claim 6, wherein the first body region is twice as thick as the second body region ### Claim 8 (depends on 6) A Silicon-On-Insulator type semiconductor device as claimed in claim 6, wherein the Partially-Depletion type transistor includes an LDD region. ### Claim 9 (depends on 6) A Silicon-On-Insulator type semiconductor device as claimed in claim 6, wherein the Partially-Depletion type transistor is a first Partially-Depletion type transistor of a certain conductivity type, the protection circuit further comparing: a second Partially-Depletion type transistor of the same conductivity type of the first Partially-Depletion type transistor, wherein the gates of the first and second Partially-Depletion type transistors and the drain of the first Partially-Depletion type transistor are commonly connected to a first power supply voltage, the source of the first Partially-Depletion type transistor and the drain of the second Partially-Depletion type transistor are connected to each other via a node, which is connected to the internal circuit, and the source of the second Partially-Depletion type transistor is connected to the second power supply voltage. ### Claim 10 A Silicon-On-Insulator type semiconductor device having a silicon substrate and a buried oxide layer formed on the silicon substrate, comprising: A first conductive line connected to a first power supply voltage; a second conductive line connected to a second power supply voltage; a substrate line electrically connected to the silicon substrate; an internal circuit formed in a first region having at least one transistor having a Silicon-On-Insulator structure, the internal circuit performing a function of the semiconductor device; and a protection circuit formed in a second region having at least one transistor having the Silicon-On-Insulator structure, the protection circuit protecting the internal circuit from electro static damage, and the gate and the source of the transistor being commonly connected to the substrate line. ### Claim 11 (depends on 10) A Silicon-On-Insulator type semiconductor device as claimed in claim 10, wherein the substrate line is formed on the surface of the silicon substrate in a field region, which electrically isolates the protection circuit from the internal circuit. ### Claim 12 (depends on 10) A Silicon-On-Insulator type semiconductor device as claimed in claim 10, wherein substrate line is formed of multi-layers, which includes a highly doped region formed on the surface of the silicon substrate and a silicide layer formed in the highly doped region. ### Claim 13 (depends on 10) A Silicon-On-Insulator type semiconductor device as claimed in claim 10, wherein the transistor is the protection circuit is a first transistor of a certain conductivity type, the protection circuit further comparing: a second transistor of the same conductivity type of the first transistor, whose gate is connected to the first transistor, wherein the source of the first transistor and the drain of the second transistor are connected to each other via a node, which is connected to the internal circuit, and the source of the second transistor is connected to the second power supply voltage.