# US 2008/0185583 A1 · Structure and method for monitoring and characterizing pattern density dependence on thermal absorption in a semiconductor manufacturing process

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- Number: US 2008/0185583 A1
- Document ID: US20080185583A1
- Status: Published application
- Kind: A1
- Application number: 11/672,059
- Filed: 2007-02-07
- Published: 2008-08-07
- Earliest claimed: 2007-02-07
- Assignees: International Business Machines Corporation
- Inventors: ISHTIAQ AHSAN; OLEG GLUSCHENKOV
- Web page: https://patentgrep.com/patent/US20080185583A1

## CPC

- H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers}
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

According to the present invention, there is disclosed a thermal detection device and method of using the device for characterizing and monitoring the dependence of pattern density on thermal absorption of a semiconductor. One or more of the devices can be disposed on a die of a test wafer. The thermal detection device comprises a silicon substrate having a test structure located substantially in the center of the silicon substrate. Frame shaped structures of polysilicon, silicon and oxide, in various configurations, form a collocated arrangement on the silicon substrate. The test wafer is subjected to a rapid thermal process and the resistance of the at least one testing structure is measured and the measured resistance of the at least one test structure is tabulated to a thermal absorption value of the at least one die.

## Claims

### Claim 1

A thermal detection device for characterizing and monitoring the dependence of pattern density on thermal absorption of a semiconductor, comprising:
a silicon substrate having a first oxide layer disposed on the upper surface thereof, and
a test structure disposed on the first oxide layer wherein the test structure is located substantially in the center of the silicon substrate.

### Claim 2 (depends on 1)

The thermal detection device of claim 1, wherein the test structure (108) is a Kelvin test structure.

### Claim 3 (depends on 1)

The thermal detection device of claim 1, wherein the first oxide layer is disposed in a first trench formed in the silicon substrate.

### Claim 4 (depends on 3)

The thermal detection device of claim 3, further including at least one polysilicon frame shaped structure formed of a gate oxide layer disposed on the silicon substrate and surrounding the first oxide layer and a polysilicon layer disposed on the gate oxide layer.

### Claim 5 (depends on 4)

The thermal detection device of claim 4, further including two or more polysilicon frame shaped structures, each formed of a gate oxide layer disposed on the silicon substrate and a polysilicon layer disposed on the gate oxide layer; and the two or more polysilicon frame shaped structures forming a collocated arrangement with at least one frame shaped oxide layer, one of which being disposed in a frame shaped trench between each of the two or more polysilicon frame shaped structures.

### Claim 6 (depends on 5)

The thermal detection device of claim 5, further including two or more frame shaped oxide structures, each formed of a second oxide layer disposed in a frame shaped trench on the silicon substrate, the two or more oxide frame shaped structures forming a collocated arrangement; and
two or more silicon frame shaped structures forming a collocated arrangement, one of the silicon frame shaped structures surrounding the first oxide layer; and
one or more oxide frame shaped structures, each being disposed between each of the two or more silicon frame shaped structures.

### Claim 7 (depends on 3)

The thermal detection device of claim 3, further including at least one silicon frame shaped structure surrounding the first oxide layer.

### Claim 8 (depends on 7)

The thermal detection device of claim 7, further including two or more silicon frame shaped structures forming a collocated arrangement with a frame shaped oxide layer disposed in a frame shaped trench between each of the two or more silicon frame shaped structures.

### Claim 9 (depends on 6)

The thermal detection device of claim 6, wherein the at least one polysilicon frame shaped structure, the at least one frame shaped oxide layer and the at least area of silicon substrate are of a shape selected from the group consisting of rectangular, circular, square and oval.

### Claim 10

A semiconductor wafer comprising:
a plurality of dies, at least one die having one or more thermal absorption detection structures thereon for characterizing and monitoring the dependence of pattern density of the at least one die on thermal absorption of the at least one die;
each of the one or more thermal absorption detection structures being a silicon substrate having a first oxide layer disposed on the upper surface of the silicon substrate; and
a test structure (108) disposed on the first oxide layer wherein the test structure is located substantially in the center of the silicon substrate.

### Claim 11 (depends on 10)

The semiconductor wafer of claim 10, wherein at least one die comprises at least one thermal absorption detection structure with a plurality of polysilicon frame structures.

### Claim 12 (depends on 10)

The semiconductor wafer of claim 10, wherein at least one die comprises at least one thermal absorption detection structure with a plurality of silicon frame structures.

### Claim 13

A method for monitoring and characterizing pattern density dependence on thermal absorption in a semiconductor manufacturing process, comprising the steps of:
creating a test wafer having at least one die incorporating at least one thermal absorption detection structure, the at least one thermal absorption detection structure including a silicon substrate having a first oxide layer disposed on the upper surface thereof and a test structure disposed on the first oxide layer wherein the test structure is located substantially in the center of the silicon substrate;
subjecting the wafer to a rapid thermal process;
measuring the resistance of the at least one testing structure; and
tabulating the measured resistance of the at least one test structure to a thermal absorption value of the at least one die.

### Claim 14 (depends on 13)

The method of claim 13, further comprising the step of determining the thermal absorption of the at least one die based on measured resistance of the at least one thermal absorption detection structure on the test wafer; and
adjusting the rapid thermal process to substantially match the thermal absorption of the at least one die.

### Claim 15 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more silicon frame structures.

### Claim 16 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more polysilicon frame structures.

### Claim 17 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more silicon frame structures and at least one thermal absorption detection structure with one or more polysilicon frame structures.

### Claim 18 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more silicon frame structures.

### Claim 19 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more polysilicon frame structures.

### Claim 20 (depends on 13)

The method of claim 13, further comprising the step of creating a wafer with at least one die having at least one thermal absorption detection structure with one or more oxide frame structures.
