# US 2008/0185173 A1 · Environmental Protection Coating System and Method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0185173 A1 - Document ID: US20080185173A1 - Status: Published application - Kind: A1 - Application number: 11/848,891 - Filed: 2007-08-31 - Published: 2008-08-07 - Earliest claimed: 2007-02-07 - Assignees: Raytheon Company - Inventors: John M. Bedinger; Michael A. Moore - Web page: https://patentgrep.com/patent/US20080185173A1 ## CPC - H05K 3/284: {for encapsulating mounted components (H05K1/185 takes precedence)} - H10W 20/075: {of multilayered thin functional dielectric layers} - H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)} - H10W 20/483: {Interconnections over air gaps, e.g. air bridges} - H10W 74/147: {the encapsulations being multilayered} - H05K 2201/0179: Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor - H05K 2201/0195: Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure - H05K 2203/1322: Encapsulation comprising more than one layer - H10W 20/072: {of dielectric parts comprising air gaps} - H10W 20/46: comprising air gaps - H10W 72/01515: {Forming coatings} - H10W 72/07336: {Soldering or alloying} - H10W 72/074: {of anisotropic conductive adhesives} - H10W 72/075: {of bond wires} - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/354: {comprising polymers} - H10W 72/534: {being rectangular} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 90/753: {between laterally-adjacent chips} - Y10T 29/49124: On flat or curved insulated base, e.g., printed circuit, etc. - Y10T 29/49146: with encapsulating, e.g., potting, etc. - Y10T 29/49155: Manufacturing circuit on or in base - Y10T 29/49982: Coating - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ## Abstract According to one embodiment of the disclosure, an environmental protection coating comprises a circuit assembly having a first protective dielectric layer and a second dielectric layer. The circuit assembly has an outer surface on which a plurality of discrete electrical components are attached. The first protective dielectric layer overlays the circuit assembly. The second dielectric layer overlays the first protective dielectric layer and is made of a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.008, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 3000 Celsius, defect densities less than 0.5/centimeter, pinhole free in films greater than 50 Angstroms, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%. ## Claims ### Claim 1 A circuit board assembly comprising: a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another; a first protective dielectric layer of alumina overlying the outer surface; a second dielectric layer overlying the first protective dielectric layer, the second dielectric layer being parylene F, parylene AF-4, or parylene HT having a thickness in the range of approximately 50 to 2000 angstroms; and a coupling agent between the first protective dielectric layer and the second dielectric layer. ### Claim 2 (depends on 1) The circuit board assembly of claim 1, further comprising an initial layer of silicon-nitride or silicon-dioxide between the substrate surface and first protective dielectric layer, the initial layer of silicon-nitride or silicon-dioxide having a thickness in the range 25 to 400 Angstroms. ### Claim 3 (depends on 1) The circuit board assembly of claim 1, further comprising an additional protective dielectric layer between the first protective dielectric layer and the second dielectric layer, the additional protective dielectric layer having a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 4 (depends on 1) The circuit device of claim 1, further comprising an adhesion promoter between the first protective dielectric layer and the second protective dielectric layer. ### Claim 5 (depends on 4) The circuit device of claim 4, wherein the adhesion promoter is gamma-methacryloxypropyltrimethoxysilane. ### Claim 6 (depends on 1) The circuit board assembly of claim 1, wherein the plurality of discrete electrical components are selected from the group consisting of resistors, capacitors, inductors, diodes, and transistors, integrated circuits, microwave monolithic integrated circuits, couplers, dividers and transmission lines. ### Claim 7 A circuit board assembly comprising: a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another; a first protective dielectric layer overlying the outer surface; and a second dielectric layer overlying the first protective dielectric layer and the plurality of discrete electrical components, the second dielectric layer comprising a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 3.0, a dielectric loss less than 0.008, a moisture absorption less than 0.04 percent, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 3000 Celsius, pinhole free in films greater than 50 Angstroms, hydrophobic with a wetting angle greater than 45 degrees, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%. ### Claim 8 (depends on 7) The circuit board assembly of claim 7, wherein the first protective dielectric layer is a dielectric material having a moisture permeability less than 0.01 gm/meter2/day, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength in excess of 8 million volts/centimeter (MV/cm), a sheet resistivity greater than 1015 ohm-centimeter, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 30%. ### Claim 9 (depends on 8) The circuit board assembly of claim 8, wherein the first protective dielectric layer is made of alumina. ### Claim 10 (depends on 7) The circuit board assembly of claim 7, wherein the dielectric material is made of a material that is selected from the group consisting of alumina, tantalum oxide, beryllium oxide, hafnium oxide, silicon nitride, silica, parylene F, aromatic-fluorinated VT-4, parylene HT®, and polytetrafluoroethylene (PTFE). ### Claim 11 (depends on 7) The circuit board assembly of claim 7, wherein the dielectric material is silica. ### Claim 12 (depends on 7) The circuit board assembly of claim 7, further comprising an additional protective dielectric layer between the first protective dielectric layer and the second dielectric layer, the additional protective dielectric layer having a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 13 (depends on 12) The circuit board assembly of claim 12, wherein the additional protective dielectric layer is a nanolaminate comprising alternate combinations of nanolaminate material that is selected from the group consisting of alumina, tantalum oxide, beryllium oxide, hafnium oxide, silicon-dioxide, fluorinated parylene, acrylic, and vapor deposited Teflon (PTFE). ### Claim 14 (depends on 7) The circuit board assembly of claim 7, wherein the plurality of discrete electrical components are selected from the group consisting of resistors, capacitors, inductors, diodes, and transistors. ### Claim 15 (depends on 7) The circuit board assembly of claim 7, wherein the circuit board further comprises one or more assembly level features that are selected from the group consisting of board traces, wire interconnections, scribe moats, integrated circuit die edges, and external connections to the circuit assembly. ### Claim 16 (depends on 7) The circuit board assembly of claim 7, wherein the second protective dielectric layer has a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 17 (depends on 7) The circuit board assembly of claim 7, further comprising an initial layer of silicon-nitride or silicon-dioxide between the substrate surface and first protective dielectric layer, the initial layer of silicon-nitride or silicon-dioxide having a thickness in the range 25 to 400 Angstroms. ### Claim 18 (depends on 7) The circuit board assembly of claim 7, further comprising an adhesion promoter between the first protective dielectric layer and the second dielectric layer. ### Claim 19 (depends on 18) The circuit board assembly of claim 18, wherein the adhesion promoter comprises a layer of silicon dioxide used independently or in conjunction with gamma-methacryloxypropyltrimethoxysilane. ### Claim 20 (depends on 7) The circuit board assembly of claim 7, further comprising a domed lid enclosure disposed over one of the plurality of discrete electrical components and between the second dielectric layer and an additional dielectric coating. ### Claim 21 (depends on 20) The circuit board assembly of claim 20, wherein the additional dielectric coating is a polymer based conformal coating material that is selected from the group consisting of parylene C, parylene D, parylene N, parylene F, acrylic, silicone and polytetrafluoroethylene (PTFE). ### Claim 22 (depends on 21) The circuit board assembly of claim 21, further comprising an inorganic or composite inorganic and organic coating overlying the additional dielectric coating. ### Claim 23 (depends on 22) The circuit board assembly of claim 22, wherein the inorganic or composite inorganic and organic coating is a nanolaminate selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide zinc oxide, parylene C, parylene D, parylene N, parylene F, parylene AF-4, aromatic fluorinated VT-4, parylene HT, and polytetrafluoroethylene (PTFE). ### Claim 24 (depends on 20) The circuit board assembly of claim 20, wherein the additional dielectric coating is an inorganic coating that is selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide, and zinc oxide. ### Claim 25 (depends on 20) The circuit board assembly of claim 20, wherein the additional dielectric coating is a nanolaminate inorganic coating consisting of alternate layers selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide and zinc oxide. ### Claim 26 A circuit board assembly comprising: a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another; a domed lid enclosure disposed over one of the plurality of discrete electrical components; and an additional dielectric coating overlying the outer surface and the domed lid enclosure. ### Claim 27 (depends on 26) The circuit board assembly of claim 26, wherein the additional dielectric coating is a polymer based conformal coating material that is selected from the group consisting of parylene C, parylene D, parylene N, parylene F, acrylic, silicone and polytetrafluoroethylene (PTFE). ### Claim 28 (depends on 27) The circuit board assembly of claim 27, further comprising an inorganic or composite inorganic and organic coating overlying the polymer based conformal coating material. ### Claim 29 (depends on 28) The circuit board assembly of claim 28, wherein the inorganic or composite inorganic and organic coating is a nanolaminate selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide zinc oxide, parylene C, parylene D, parylene N, parylene F, parylene AF-4, aromatic fluorinated VT-4, parylene HT, and polytetrafluoroethylene (PTFE). ### Claim 30 (depends on 26) The circuit board assembly of claim 26, wherein the relatively thick dielectric layer is a nanolaminate inorganic coating consisting of alternate layers selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide and zinc oxide. ### Claim 31 A circuit board assembly comprising: a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another; and a first protective dielectric layer overlying the outer surface, the first protective dielectric layer made of a nanolaminate selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide zinc oxide, parylene C, parylene D, parylene N, parylene F (or AF-4 for aliphatic fluorine), aromatic fluorinated VT-4, parylene HT®, and polytetrafluoroethylene (PTFE). ### Claim 32 (depends on 31) The circuit board assembly of claim 31, wherein the first protective dielectric layer has a thickness that is selected to minimize dielectric constant, dielectric loss and moisturepermeability. ### Claim 33 (depends on 32) The circuit board assembly of claim 32, wherein the first protective dielectric layer has a composite inorganic thickness between 50 and 2000 Angstroms and a composite organic thickness between 50 and 2000 Angstroms. ### Claim 34 A method comprising: providing a circuit board having an outer surface, the outer surface being configured with a plurality of discrete electrical components that are each manufactured independently of one another; coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer; and coating the first protective dielectric layer with a second dielectric layer, the second dielectric layer comprising a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.002, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 3000 Celsius, defect densities less than 0.5/centimeter, pinhole free in films greater than 50 Angstroms, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%. ### Claim 35 (depends on 34) The method of claim 34, wherein coating the first protective dielectric layer with a second dielectric layer, further comprises coating the first protective dielectric layer with a second dielectric layer having a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 36 (depends on 34) The method of claim 34, wherein coating the first protective dielectric layer with a second dielectric layer, further comprises coating the first protective dielectric layer with a second dielectric layer made of a material that is selected from the group consisting of alumina, silica, parylene F, aromatic-fluorinated VT-4, and parylene HT®. ### Claim 37 (depends on 34) The method of claim 34, wherein coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, further comprises, coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2. ### Claim 38 (depends on 34) The method of claim 34, wherein the first protective dielectric layer is a nanolaminate comprising alternate combinations of nanolaminate material that is selected from the group consisting of alumina and silicon-dioxide, alumina and fluorinated parylene, alumina and acrylic, and alumina and vapor deposited Teflon (PTFE). ### Claim 39 (depends on 37) The method of claim 37, wherein coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, further comprises coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer made of alumina. ### Claim 40 (depends on 37) The method of claim 37, wherein coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, further comprises coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer that has a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 41 (depends on 34) The method of claim 34, further comprising, prior to coating the first protective dielectric layer with a second dielectric layer, applying a layer of a adhesion promoter to the first protective dielectric layer. ### Claim 42 (depends on 41) The method of claim 41, wherein applying a layer of a adhesion promoter comprises applying a layer of gamma-methacryloxypropyltrimethoxysilane to the first protective dielectric layer. ### Claim 43 (depends on 34) The method of claim 34, further comprising, prior to coating the first protective dielectric layer with a second dielectric layer, coating the first protective dielectric layer with an additional protective dielectric layer, the additional protective dielectric layer having a thickness in the range of approximately 50 to 1000 angstroms. ### Claim 44 (depends on 34) The method of claim 34, wherein the plurality of discrete electrical components are selected from the group consisting of resistors, capacitors, inductors, diodes, and transistors. ### Claim 45 (depends on 34) The method of claim 34, wherein the circuit board further comprises one or more assembly level features that are selected from the group consisting of board traces, wire interconnections, scribe moats, integrated circuit die edges, and external connections to the circuit assembly. ### Claim 46 (depends on 34) The method of claim 34, further comprising placing a domed lid enclosure over one of the plurality of discrete electrical components and coating the outer surface and domed lid enclosure with an additional dielectric coating. ### Claim 47 (depends on 47) The method of claim 47, wherein the additional dielectric coating is a polymer based conformal coating material that is selected from the group consisting of parylene C, parylene D, parylene N, parylene F, acrylic, silicone and polytetrafluoroethylene (PTFE). ### Claim 48 (depends on 47) The method of claim 47, further comprising coating the additional dielectric coating with an inorganic or composite inorganic and organic coating. ### Claim 49 (depends on 48) The method of claim 48, wherein the inorganic or composite inorganic and organic coating is a nanolaminate selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide zinc oxide, parylene C, parylene D, parylene N, parylene F, parylene AF-4, aromatic fluorinated VT-4, parylene HT, and polytetrafluoroethylene (PTFE). ### Claim 50 (depends on 46) The method of claim 46, wherein the additional dielectric coating is an inorganic coating that is selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide, and zinc oxide. ### Claim 51 (depends on 46) The method of claim 46, wherein the additional dielectric coating is a nanolaminate inorganic coating consisting of alternate layers selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide and zinc oxide. ### Claim 52 A method comprising: providing a circuit board having an outer surface; attaching a plurality of discrete electrical components to the outer surface at an assembly level phase, each of the plurality of discrete electrical components being manufactured independently of one another; and coating, at the assembly level phase, the outer surface and the plurality of discrete electrical components with a first dielectric layer, the first dielectric layer comprising a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.002, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 3000 Celsius, defect densities less than 0.5/centimeter, pinhole free in films greater than 50 Angstroms, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%. ### Claim 53 (depends on 52) The method of claim 52, further comprising, prior to coating the outer surface and the plurality of discrete electrical components with a first dielectric layer, coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, the first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2. ### Claim 54 (depends on 53) The method of claim 53, wherein coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, further comprises coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer made of alumina. ### Claim 55 (depends on 52) The method of claim 52, wherein the first protective dielectric layer is a nanolaminate comprising alternate combinations of nanolaminate material that is selected from the group consisting of alumina and silicon-dioxide, alumina and fluorinated parylene, alumina and acrylic, and alumina and vapor deposited Teflon (PTFE). ### Claim 56 (depends on 52) The method of claim 52, wherein coating the outer surface and the plurality of discrete electrical components with a first dielectric layer, further comprises coating the outer surface and the plurality of discrete electrical components with a first dielectric layer made of a material that is selected from the group consisting of alumina, silica, parylene F, aromatic-fluorinated VT-4, and parylene HT® ### Claim 57 (depends on 52) The method of claim 52, further comprising, prior to the act of coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer, coating the first protective dielectric layer with an additional protective dielectric layer, the additional protective dielectric layer having a thickness in the range of approximately 50 to 2000 angstroms. ### Claim 58 (depends on 52) The method of claim 52, wherein coating, at the assembly level phase, the outer surface and the plurality of discrete electrical components with a first dielectric layer further comprises coating, at the assembly level phase, the outer surface and the plurality of discrete electrical components with a first dielectric layer having a thickness in the range of approximately 50 to 1000 angstroms. ### Claim 59 (depends on 52) The method of claim 52, further comprising, prior to coating the outer surface with a first dielectric layer, applying a layer of a adhesion promoter to the first protective dielectric layer. ### Claim 60 (depends on 59) The method of claim 59, wherein applying a layer of a adhesion promoter further comprises applying a layer of gamma-methacryloxypropyltrimethoxysilane to the first protective dielectric layer. ### Claim 61 (depends on 52) The method of claim 52, wherein the plurality of discrete electrical components are selected from the group consisting of resistors, capacitors, inductors, diodes, and transistors. ### Claim 62 (depends on 52) The method of claim 52, wherein the circuit board further comprises one or more assembly level features that are selected from the group consisting of board traces, wire interconnections, scribe moats, integrated circuit die edges, and external connections to the circuit assembly. ### Claim 63 (depends on 52) The method of claim 52, further comprising placing a domed lid enclosure over one of the plurality of discrete electrical components and coating the outer surface and domed lid enclosure with an additional dielectric coating. ### Claim 64 (depends on 63) The method of claim 63, wherein the additional dielectric coating is a polymer based conformal coating material that is selected from the group consisting of parylene C, parylene D, parylene N, parylene F, acrylic, silicone and polytetrafluoroethylene (PTFE). ### Claim 65 (depends on 64) The method of claim 64, further comprising coating the additional dielectric coating with an inorganic or composite inorganic and organic coating. ### Claim 66 (depends on 65) The method of claim 65, wherein the inorganic or composite inorganic and organic coating is a nanolaminate selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide zinc oxide, parylene C, parylene D, parylene N, parylene F, parylene AF-4, aromatic fluorinated VT-4, parylene HT, and polytetrafluoroethylene (PTFE). ### Claim 67 (depends on 63) The method of claim 63, wherein the additional dielectric coating is an inorganic coating that is selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide, and zinc oxide. ### Claim 68 (depends on 63) The method of claim 63, wherein the additional dielectric coating is a nanolaminate inorganic coating consisting of alternate layers selected from the group consisting of alumina, silicon nitride, silica, hafnium oxide, beryllium oxide, tantalum oxide and zinc oxide.