# US 2008/0184801 A1 · System for measuring resonant frequency and delay time of quartz crystal microbalance > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2008/0184801 A1 - Document ID: US20080184801A1 - Status: Published application - Kind: A1 - Application number: 11/783,943 - Filed: 2007-04-13 - Published: 2008-08-07 - Earliest claimed: 2007-02-05 - Assignees: Tatung Co., Ltd. - Inventors: Chao-Fa Lee; Tsong-Rong Yan; Cheng-Hsing Kuo - Web page: https://patentgrep.com/patent/US20080184801A1 ## CPC - G01H 13/00: Measuring resonant frequency - G01H: MEASUREMENT OF MECHANICAL VIBRATIONS OR ULTRASONIC, SONIC OR INFRASONIC WAVES ## Abstract This present invention relates to a system for measuring resonant frequency and delay time of the quartz crystal microbalance. The system includes a transistor oscillating circuit, a switch circuit, a comparator circuit, and a control circuit. The transistor oscillating circuit comprises a quartz oscillator for generating an original oscillating signal. The switch circuit is coupled to the transistor oscillating circuit for outputting a start signal to generate the original oscillating signal. The comparator circuit is coupled to the transistor oscillating circuit for transforming the original oscillating signal to a square wave oscillating signal. The control circuit is coupled to the comparator circuit for receiving the square oscillating signal to estimate the resonant frequency and the delay time of the quartz crystal microbalance. ## Claims ### Claim 1 A system for measuring resonant frequency and delay time of the quartz crystal microbalance, comprising: a transistor oscillating circuit, which has a quartz oscillator for generating an original oscillating signal; a switch circuit, which is coupled to the transistor oscillating circuit and receives a start signal for enabling the transistor oscillating circuit to generate the original oscillating signal; a comparator circuit, which is coupled to the transistor oscillating circuit for converting the original oscillating signal to a square wave oscillating signal; and a control circuit, which is coupled to the comparator circuit for receiving the square wave oscillating signal so as to determine the resonant frequency and the delay time of the quartz crystal microbalance. ### Claim 2 (depends on 1) The system as claimed in claim 1, further comprising: an amplitude hold circuit, which is coupled to the transistor oscillating circuit and the control circuit for receiving the original oscillating signal to output a hold maximum oscillating signal. ### Claim 3 (depends on 1) The system as claimed in claim 1, wherein the control circuit comprises: a frequency and oscillating start signal detecting circuit, which is coupled to the comparator circuit for receiving the square oscillating signal to estimate the resonant frequency of the quartz crystal microbalance so as to generate an oscillating start signal and a frequency value; and a processor, which is coupled to the frequency and oscillating start signal detecting circuit for determining the delaying time of the quartz crystal microbalance based on the oscillating beginning signal. ### Claim 4 (depends on 3) The system as claimed in claim 3, wherein the frequency and oscillating start signal detecting circuit further comprises: a counter coupled to the comparator circuit for counting the square wave outputted by the comparator circuit to generate the frequency value. ### Claim 5 (depends on 4) The system as claimed in claim 4, wherein the frequency and oscillating start signal detecting circuit is implemented by a programmable logic element. ### Claim 6 (depends on 5) The system as claimed in claim 5, wherein the switch circuit is composed of a first resistor, a second resistor, and a first transistor. ### Claim 7 (depends on 6) The system as claimed in claim 6, wherein the first transistor is an NPN transistor. ### Claim 8 (depends on 7) The system as claimed in claim 7, wherein the base of the NPN transistor is coupled to the processor for receiving the start signal outputted by the processor. ### Claim 9 (depends on 8) The system as claimed in claim 8, wherein the start signal is a high level signal. ### Claim 10 (depends on 5) The system as claimed in claim 5, wherein the transistor oscillating circuit comprises a switch, a quartz oscillator, a first capacitor, a second capacitor, a third resistor, a fourth resistor and a second transistor. ### Claim 11 (depends on 5) The system as claimed in claim 5, wherein the second transistor is an NPN transistor. ### Claim 12 (depends on 11) The system as claimed in claim 11, wherein a control end of the switch is connected to the collector of the first transistor, the output end of the switch is connected to one end of the first capacitor, the base of the second transistor, and one end of the third resistor; one end of the quartz oscillator is connected to a input end of the switch, and the other end of the quartz oscillator is connected to a low voltage level; the other end of the first capacitor is connected to one end of the second capacitor, and the other end of the second capacitor is connected to a low voltage level; the collector of the second transistor is connected to the other end of the third resistor, and the emitter of the second transistor is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to a low voltage level. ### Claim 13 (depends on 12) The system as claimed in claim 12, wherein the comparator circuit comprises a third capacitor, a fifth resistor, and a first comparator. ### Claim 14 (depends on 13) The system as claimed in claim 13, wherein one end of the third capacitor is connected to one end of the first capacitor and the second capacitor, and the other end of the third capacitor is connected to a positive input end of the first comparator; one end of the fifth resistor is connected to a reference voltage and a negative input end of the first comparator, and the other end of the fifth resistor is connected to a positive input end of the first comparator. ### Claim 15 (depends on 14) The system as claimed in claim 14, wherein the reference voltage is 1.8 volts. ### Claim 16 (depends on 15) The system as claimed in claim 15, wherein the amplitude hold circuit comprises a fourth capacitor, a first diode, a second comparator, a second diode, a adjustable resistor and a fifth capacitor. ### Claim 17 (depends on 16) The system as claimed in claim 16, wherein one end of the fourth capacitor is connected to one end of the first capacitor and the second capacitor, and the other end of the fourth capacitor is connected to a positive input end of the second comparator; the negative end of the first diode is connected to the positive input end of the second comparator, and the positive end of the first diode is connected to a high voltage level; the positive end of the second diode is connected to the output end of the second comparator; one end of the fifth capacitor is connected to the negative end of the second diode, and the other end of the fifth capacitor is connected to a low voltage level; one end of the adjustable resistor is connected to the negative end of the second diode, and the other end of the adjustable resistor is connected to a low voltage level, and the mid end of the adjustable resistor is connected to a negative end of the second comparator, so as to make the amplitude hold circuit form as a voltage follower.