Just-In-Time Compilation in a Heterogeneous Processing Environment

An information handling system comprising:

• a plurality of heterogeneous processors, wherein the plurality of heterogeneous processors includes a first processor type that utilizes a first instruction set architecture (ISA) and a second processor type that utilizes a second instruction set architecture (ISA);
• a local memory corresponding to each of the plurality of heterogeneous processors;
• a shared memory accessible by the heterogeneous processors;
• a broadband bus interconnecting the plurality of heterogeneous processors and the shared memory;
• one or more nonvolatile storage devices accessible by the heterogeneous processors;
• and
• a first set of instructions running a first process on a first processor from the plurality of heterogeneous processors that utilizes the first ISA, and a second set of instructions running a JIT compiler on a second processor from the plurality of heterogeneous processors that utilizes the second ISA, wherein the first and second processors execute the sets of instructions in order to perform actions of:
• sending JIT compilation request from the first process to the JIT compiler;
• in response to the request, reading, by the JIT compiler, a plurality of non-compiled statements from the shared memory;
• compiling, by the JIT compiler, the non-compiled statements into one or more compiled segments of executable code;
• and
• storing the compiled segments of executable code in the shared memory.

A computer program product stored in a computer readable medium, comprising functional descriptive material that, when executed by a data processing system, causes the data processing system to perform actions that include:

• sending a Just-in-Time (JIT) compilation request from a first process running on a first processor included in a plurality of heterogeneous processors on a computer system to a JIT compiler running on a second processor included in the plurality of heterogeneous processors, wherein the first processor is based on a first instruction set architecture (ISA) and the second processor is based on a second ISA;
• in response to the request, reading, by the JIT compiler, a plurality of non-compiled statements from a shared memory accessible from both the first and second processors;
• compiling the non-compiled statements into one or more compiled segments of executable code;
• and
• storing the compiled segments of executable code in the shared memory.