Providing high availability in a pci-expresstm link in the presence of lane faults

Abstract

A method, device, and system are disclosed. In one embodiment, the method comprises discovering a failure on a PCI Express interconnect, determining whether a failure override bit has been set to override the standard PCI Express Polling.Compliance state for the failure on the PCI Express interconnect, and if the failure override bit has been set, entering PCI Express Polling.Configuration state if any one lane of the interconnect successfully completes the transmitting and receiving training sequence requirements in PCI Express Polling.Active state.

Dependencies are inferred from the claim text.