Synthesized assertions in a self-correcting processor and applications thereof

A system, comprising:

• a processor that includes assertion check logic that checks whether the processor is operating in a specified manner;
• and
• memory coupled to the processor,
• wherein, if the processor is not operating in the specified manner, the assertion check logic generates at least one output signal that is used to alter operation of the processor so that the processor operates in the specified manner.

A tangible computer readable storage medium comprising a processor embodied in software, the processor comprising:

• a fetch unit that fetches instructions;
• an execution unit that executes instructions;
• and
• assertion check logic, coupled to the fetch unit and the execution unit, that generates at least one output signal that is used to alter operation of the processor if the processor is not operating in a specified manner.