Instruction set architecture with overlapping fields
OwnerDaniel Citroninventor
Life of this patent
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Abstract
A system and corresponding methods that facilitate implementing and decoding variable size instruction fields in a fixed size instruction are provided. In accordance with one aspect of the invention, an instruction has one or more instructions fields, wherein each field is represented by a plurality of bits arranged in a first order. The decoding method comprises fetching the instruction into an instruction register; and determining a mapping foFr a plurality of bits that represent each instruction field, wherein according to the mapping a first set of bits represents a first instruction field, and a second set of bits represents a second instruction field; such that one or more bits in the first set overlap one or more bits in the second set.
Claims20
A method for decoding an instruction having one or more instruction fields, wherein each field is represented by a plurality of bits arranged in a first order, the method comprising:
- fetching the instruction into an instruction register;
- and
- determining a mapping for a plurality of bits that represent each instruction field,
- wherein according to the mapping:
- a first set of bits represents a first instruction field, and
- a second set of bits represents a second instruction field,
- such that one or more bits in the first set overlap with one or more bits in the second set.
A system for decoding a fixed size instruction having one or more fixed size instruction fields, wherein each field is represented by a plurality of bits arranged in a first order, the system comprising:
- a logic unit for fetching the entire fixed size instruction into an instruction register;
- and
- a logic unit for processing an opcode field of the instruction to determine a mapping of the plurality of bits that represent each of the instruction fields,
- wherein according to the mapping:
- a first set of bits represents a first instruction field, and
- a second set of bits represents a second instruction field,
- such that one or more bits in the first set overlap with one or more bits in the second set.
A method for constructing a fixed size instruction having one or more fixed size instruction fields, wherein each field is represented by a plurality of bits arranged in a first order, the method comprising:
- constructing an opcode field for the instruction to map one or more of the plurality of bits to one or more instruction fields, wherein according to the map:
- a first set of bits represents a first instruction field, and
- a second set of bits represents a second instruction field,
- such that one or more bits in the first set overlap with one or more bits in the second set.
Dependencies are inferred from the claim text.