Apparatus, system, and method for automatically resetting an inter-integrated circuit bus

An apparatus to reset an inter-integrated circuit (I2C) bus slave, the apparatus:

• comprising:
• the I2C bus slave configured to communicate over a data line and a clock line of an I2C bus;
• a sinking current detector configured to detect a specified current in the data line and the clock line, wherein the sinking current detector comprises
• a data line resistor in series with the data line;
• a clock line resistor in series with the clock line;
• a data line differential amplifier configured to detect a first specified voltage across the data line resistor wherein the first specified voltage is substantially equal to a data line resistor resistance multiplied by the specified current;
• a clock line differential amplifier configured to detect a second specified voltage across the clock line resistor wherein the second specified voltage is substantially equal to a clock line resistor resistance multiplied by the specified current;
• a timer module configured to detect the specified current for a specified interval;
• and
• a reset module configured to reset the I2C bus slave in response to the timer module detecting the specified interval of the specified voltage.