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US 2008/0177913 A1Published application
Memory systems and memory access methods
AssigneeMediatek Inc.
InventorChing-Chih Li
Life of this patent
Estimating the term…
Abstract
A memory system includes a first memory unit, a transmission bus having an impedance, and a memory controller having a first on-die termination circuit, coupled to the first memory unit through the transmission bus. The first on-die termination circuit matches the impedance of the transmission bus in response to the memory controller writing data to the first memory unit.
Claims28
A memory system, comprising:
- a first memory unit;
- a transmission bus having an impedance;
- a memory controller accessing the first memory unit;
- and
- a first on-die termination circuit located in the memory controller and coupled to the first memory unit through the transmission bus to match the impedance of the transmission bus, comprising:
- a termination resistor coupled to the transmission bus;
- and
- a switch coupled between the termination resistor and a bias voltage, wherein the switch is turned on to activate the termination resistor in response to the memory controller accessing the first memory unit.
5 more elements
A memory system, comprising:
- a first memory unit;
- a transmission bus having an impedance;
- and
- a memory controller having a first on-die termination circuit, coupled to the first memory unit through the transmission bus, wherein the first on-die termination circuit matches the impedance of the transmission bus in response to the memory controller writing data to the first memory unit.
1 more element
A memory access method, comprising:
- obtaining a type of a first memory unit;
- determining a bias voltage applied to a first on-die termination circuit in a memory controller according to the type of the first memory unit;
- the memory controller writing data to the first memory unit through a transmission bus having an impedance, wherein the first on-die termination circuit matches the impedance of the transmission bus in response to the memory controller writing data to the first memory unit.
Dependencies are inferred from the claim text.