Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors
AssigneeRound Rock Research, LLC
InventorHoward E. Rhodes
Life of this patent
Estimating the term…
Abstract
A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.
Claims22
1-49. (canceled)
A method of forming a pixel cell of an imaging device, the method comprising:
- forming at least one transistor over a semiconductor substrate of a first conductivity type, the at least one transistor having a threshold voltage lower than the threshold voltage of another transistor of the pixel cell formed over the semiconductor substrate.
61-143. (canceled)
A method of forming a pixel cell of an imaging device, the method comprising:
- forming first and second gate structures of respective first and second transistors on a substrate of a first conductivity type, the first gate structure being spaced apart from the second gate structure;
- forming lightly doped drain regions of a second conductivity type on opposite sides of the second gate structure, but not on at least one side of the first gate structure;
- and
- forming source and drain regions of the second conductivity type on opposite sides of the first and second gate structures.
A method of forming a pixel sensor cell comprising:
- forming first and second gate structures of respective first and second transistors on a substrate of a first conductivity type, the first gate structure being spaced apart from the second gate structure;
- forming halo implanted regions of the first conductivity type on opposite sides of the second gate structure, but not on at least one side of the first gate structure;
- and
- forming source and drain regions of a second conductivity type on opposite sides of the first and second gate structures.
Dependencies are inferred from the claim text.