Clock generating apparatus and clock generating method
AssigneeKabushiki Kaisha Toshiba
InventorKyungwoon Jang
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Abstract
A clock generating apparatus has an integral ratio divider for, according to frequency-dividing parameters for generating a second clock signal including a second frequency by using a first clock signal including a first frequency, outputting the second clock signal, and a frequency-dividing parameter generating portion for comparing program clock reference inputted from outside with an STC value based on the second clock signal and outputting the frequency-dividing parameters so as to converge a discrepancy between the program clock reference and the STC value within a predetermined range, and wherein the frequency-dividing parameter generating portion generates new frequency-dividing parameters each time the program clock reference is inputted from outside.
Claims11
A clock generating apparatus comprising:
- an integral ratio divider for, according to frequency-dividing parameters for generating a second clock signal including a second frequency by using a first clock signal including a first frequency, outputting the second clock signal;
- and
- a frequency-dividing parameter generating portion for comparing program clock reference inputted from outside with an STC value based on the second clock signal and outputting the frequency-dividing parameters so as to converge a discrepancy between the program clock reference and the STC value within a predetermined range, and wherein:
- the frequency-dividing parameter generating portion generates new frequency-dividing parameters each time the program clock reference is inputted from outside.
A clock generating apparatus comprising:
- an integral ratio divider for, provided with a first clock signal of a first frequency and frequency-dividing parameters, outputting a second clock signal of a second frequency by combining P (P is an integer of 1 or more) frequency dividing of the first clock signal with P+1 frequency dividing at a ratio based on the frequency-dividing parameters;
- a counter for having the second clock signal inputted and generating and outputting a count value based on the second clock signal;
- a subtracter for, provided with a PCR value included in program clock reference and the count value, calculating a difference between the PCR value and an STC value based on the count value and outputting it as a difference value;
- and
- a frequency-dividing parameter generating portion for having the difference value, a previous difference value which is the difference value outputted from the subtracter last time and previous frequency-dividing parameters which are the frequency-dividing parameters outputted last time inputted, comparing the difference value with the previous difference value and adjusting the previous frequency-dividing parameters based on a comparison result so as to output the frequency-dividing parameters.
A clock generating method comprising:
- generating and outputting a second clock signal including a second frequency by combining P (P is an integer of 1 or more) frequency dividing and P+1 frequency dividing of a first clock signal including a first frequency at a ratio based on frequency-dividing parameters;
- counting the second clock signal and outputting a count value;
- calculating a difference between a PCR value included in program clock reference and an STC value based on the count value and outputting a difference value;
- and
- generating and outputting the frequency-dividing parameters based on transition of the difference value.
Dependencies are inferred from the claim text.