Method of operating multi-level cell and integrate circuit for using multi-level cell to store data

A integrated circuit using multi-level cell for data storage, comprising

• a semiconductor substrate;
• a multi-level cell array coupled to the semiconductor substrate;
• a bias arrangement machine, used to operate the multi-level cell of the array until a threshold voltage of the multi-level cell is larger than a pre-programming threshold voltage;
• and
• circuitry coupled to the array of the multi-level cells, the circuitry adapted to couple voltage to one or more cells of the array of multi-level cells for a particular duration from a plurality of particular durations has a corresponding data value from a plurality of data values that are storable on the multi-level cells, and the circuitry comprises at least a row decoder and a column decoder coupled to the array and a sense amplifiers/data in structures coupled to the column decoder, wherein the sense amplifiers/data in structures is used to operate the multi-level cell of the array until the threshold voltage of the multi-level cell is larger than a target programming threshold voltage and smaller than the pre-programming threshold voltage.