Resistance random access memory having common source line

A data access method for writing data having a first state and a second state to a selected memory cell of a resistance random access memory (RRAM) through first and second write paths formed in mutually opposite directions, the RRAM having a plurality of word lines, a plurality of bit lines, a memory cell array having a plurality of memory cells which are disposed in a matrix and each have an access transistor and a resistive memory device, and a plurality of source lines each disposed between every two word lines and in the same direction as said word lines, and each connected to source terminals of corresponding access transistors having gate terminals connected to corresponding two word lines, the method comprising:

• applying a positive source voltage to said selected source line;
• applying a word line drive voltage to a selected word line of said plurality of word lines;
• and
• applying a voltage at least twice the value of said positive source voltage to a selected bit line of said plurality of bit lines via said first write path when writing the data having said first state in said selected memory cell, and applying a ground voltage to said selected bit line via said second write path when writing the data having said second state in said memory cell.

A resistance random access memory (RRAM) comprising:

• a plurality of word lines arranged in a first direction;
• a plurality of bit lines arranged in a second direction;
• a memory cell array having a plurality of memory cells arranged in a matrix of rows and columns located at each intersection of said word lines and bit lines, each of said memory cells having an access transistor;
• a plurality of commonly shared source lines, each of said source lines disposed between said word lines and in the same direction as said word lines, each of said source lines commonly connected to each of said access transistors associated with a first and second wordlines adjacent to each source line.