US 2008/0174928 A1 · SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination

Abstract

Methods and apparatuses implement a thermal memory effect for a solid state power controller. A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor (156) and a counter (174), wherein the first capacitor (156) charges multiple times, when an over current event occurs, and the counter (174) accumulates a count related to the charging of the first capacitor (156) for the multiple times, to detect a trip condition; and a discharging module connected to the trip module, the discharging module including a resistor (166) and a second capacitor (158), wherein an electrical parameter associated with the count decays with time using the resistor (166) and the second capacitor (158).

Claims20

Dependent claims

A solid state power controller trip apparatus with thermal memory, said apparatus comprising:

a trip module including a first capacitor and a counter, wherein
said first capacitor charges multiple times, when an over current event occurs, and
said counter accumulates a count related to said charging of said first capacitor for said multiple times, to indicate a temperature increase in a wire for detection of a trip condition;
and
a discharging module connected to said trip module, said discharging module including a resistor and a second capacitor, wherein an electrical parameter associated with said count decays with time using said resistor and said second capacitor.

2 more elements

Dependencies are inferred from the claim text.

SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination

Life of this patent

SSPC technology incorporated with thermal memory effects to achieve the fuse curve coordination

Life of this patent

Abstract

Claims20