Apparatus and method for compensating an image display

A method for compensating an image comprising:

• dividing an n-th frame datum of m-bit into a most significant bit(s) of the n-th frame datum and a least significant bit(s) of the n-th frame datum to output the most significant bit(s) of the n-th frame datum and the least significant bit(s) of the n-th frame datum;
• outputting a most significant bit(s) of an n-th frame compensated datum by using the most significant bit(s) of the n-th frame datum and a stored most significant bit(s) of an (n−1)-th frame datum;
• and
• synthesizing the most significant bit(s) of the n-th compensated datum and a least significant bit(s) of the n-th frame datum to output an n-th frame compensated datum of m-bit,
• wherein “m” and “n” are natural numbers.

An image-compensating apparatus comprising:

• an input dividing part dividing an (n+1)-th frame datum into the most significant bit(s) of the (n+1)-th frame datum and the least significant bit(s) of the (n+1)-th frame datum to output the most significant bit(s) of the (n+1)-th frame datum and the least significant bit(s) of the (n+1)-th frame datum;
• a storing part storing an (n−1)-th frame datum and an n-th frame datum;
• a first gray scale compensating part outputting a first most significant bit(s) of an n-th frame compensated datum by using the most significant bit(s) of the n-th frame datum and the most significant bit(s) of the (n−1)-th frame datum;
• a second gray scale compensating part comparing the first most significant bit(s) of the n-th frame compensated datum with a first setting value and comparing the most significant bit(s) of the (n+1)-th frame datum with a second setting value to change the first most significant bit(s) of the n-th frame compensated datum into a second most significant bit(s) of the n-th frame compensated datum;
• an LSB generating part comparing the (n−1)-th, n-th, and (n+1)-th frame data with each other to generate the least significant bit(s) of the n-th frame compensated datum;
• and
• an output synthesizing part synthesizing the second most significant bit(s) of the n-th frame compensated datum and the least significant bit(s) of the n-th frame datum to output an n-th frame compensated datum.

A method for compensating an image, comprising:

• dividing an (n+1)-th frame datum of m-bits into the most significant bit(s) of the (n+1)-th frame datum and the least significant bit(s) of the (n+1)-th frame datum to output the most significant bit(s) of the (n+1)-th frame datum and the least significant bit(s) of the (n+1)-th frame;
• outputting the first most significant bit(s) of an n-th frame compensated datum by using the most significant bit(s) of a stored n-th frame datum and the most significant bit(s) of a stored (n−1)-th frame datum;
• comparing the first significant bit of the n-th frame compensated datum with a first setting value and the most significant bit(s) of the (n+1)-th frame datum with a second setting value to change the first most significant bit(s) of the n-th frame compensated datum into the second most significant bit(s) of the n-th frame compensated datum;
• comparing the most significant bits of the (n−1)-th, n-th, and (n+1)-th frame data with each other to generate the least significant bit(s) of the n-th frame compensated datum;
• and
• synthesizing the second most significant bit(s) of the n-th frame compensated datum and the least significant bit(s) of the n-th frame datum to output the n-th frame compensated datum of m-bit.

A display apparatus comprising:

• a display panel displaying an image, the display panel including a plurality of data lines and a plurality of gate lines crossing the data lines;
• an image compensator dividing a frame datum of m-bit into the most significant bit(s) of the frame datum and the least significant bit(s) of the frame datum, compensating the most significant bit(s) of the frame datum, and synthesizing the compensated most significant bit(s) of the frame datum and the least significant bit(s) of the frame datum to output a frame compensated datum of m-bit;
• a source driver changing the frame compensated datum of m-bit into an analog typed data voltage and outputting the analog typed data voltage to the data lines;
• and
• a gate driver generating gate signals and outputting the gate signals to the gate lines, wherein “m” is a natural number of 10 or more.