Tail-current steering circuit and method for rail-to-rail operational amplifier input stage

A method of reducing waste bias current in amplifier circuitry including

• i. a first pair of differentially coupled input transistors, a differential input voltage being coupled between gates of the first pair, and a second pair of differentially coupled input transistors, the differential input signal also being coupled between gates of the second pair, drains of the first and second pairs of differentially coupled input transistors being coupled to a folded-cascode stage,
• ii. first current mirror circuitry for generating a reference current,
• iii. second current mirror circuitry receiving the reference current and producing a mirrored reference current, and
• iv. first current steering circuitry operative to steer the mirrored reference current as a first tail current through the first pair of differentially coupled input transistors when a common mode voltage associated with the differential input voltage exceeds a first reference voltage,
• the method comprising:
• (a) amplifying a first portion of the mirrored reference current when the common mode voltage is greater than the first reference voltage to produce a second tail current for the second differentially coupled pair of transistors;
• and
• (b) feeding a second portion of the mirrored reference current back to an output of the first current mirror and summing the second portion of the mirrored reference current with the reference current so as to reduce the first portion of the mirrored reference current when the common mode voltage is greater than the first reference voltage.

Amplifier circuitry comprising:

• (a) a first pair of differentially coupled input transistors, a differential input voltage being coupled between gates of the first pair, and a second pair of differentially coupled input transistors, the differential input signal also being coupled between gates of the second pair, drains of the first and second pairs of differentially coupled input transistors being coupled to a folded cascode stage;
• (b) first current mirror circuitry for generating a reference current;
• (c) second current mirror circuitry receiving the reference current and producing a mirrored reference current;
• (d) current steering circuitry operative to steer the mirrored reference current as a first tail current through the first pair of differentially coupled input transistors when a common mode voltage associated with the differential input voltage exceeds a first reference voltage;
• (e) means for amplifying a first portion of the mirrored reference current when the common mode voltage is greater than the first reference voltage to produce a second tail current for the second differentially coupled pair of transistors;
• and
• (f) means for feeding a second portion of the mirrored reference current back to an output of the first current mirror and summing the second portion of the mirrored reference current with the reference current so as to reduce the second portion of the mirrored reference current when the common mode voltage is greater than the first reference voltage.