Charge pump circuit for high voltage generation
AssigneeEtron Technology, Inc.
InventorJen-Shou Hsu
Life of this patent
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AssigneeEtron Technology, Inc.
InventorJen-Shou Hsu
Estimating the term…
A circuit and method are given, to realize a high efficiency voltage multiplier for integrated circuits generating an internal and flexible positive or negative high voltage on-chip supply voltage from low external positive or negative supply voltages or ground. Applying multi-phase control signals to voltage boost internal nodes allows for eliminating threshold voltage drop losses and thus improves the voltage pumping gain compared to circuits with diode-configured FETs of prior art. Making use of voltage signals from antecedent stages in order to bias the bulk of MOS transistors fabricated in triple-well technology enables relaxing of the gate oxide stress within high order stage MOS transistors. Such a method, called leap-frog bulk potential tracking method, makes MOS transistors from different stages exhibit about the same body effect, which is very important because MOS transistors of higher order stages now show the same performance as MOS transistors from lower order stages. Important also in terms of efficiency as the charge sharing speed of high order MOS transistors always dominates the total charge pump performance and the driving force of pumped currents, thus also allowing for a greater number of serially connectable stages overall or a smaller number necessary for a certain targeted output voltage.
A charge pump circuit being driven by a first set of control clock signals and a second set of control clock signals, comprising:
A circuit, realizing a Charge Pump (CP) for High Voltage Generation used for voltage multiplier devices and consisting of a basic circuit structure arranged in a, versus a virtual middle line, fundamentally symmetrical configuration and being controlled by a set of three multiphase pairs of control clock signals either as a first pair of complementary signals or as second and third pairs of signals each member signal of which is shifted by one half clock cycle versus its other member signal, comprising:
A method for implementing a Charge Pump (CP) Circuit for High Voltage Generation device with multiphase control clock signals and with one or more CP-stages implemented as MOS transistor components and realized as an Integrated Circuit (IC) fabricated in MOS technology, comprising the steps of:
Dependencies are inferred from the claim text.