Path delay adjustment circuitry using programmable driver

A computer implemented method for dynamically adjusting a path delay of a circuit, the computer implemented method comprising:

• receiving a first signal at a latch in the circuit, wherein the latch processes the first signal and generates a first output;
• comparing the first output of the latch against a second output from a second latch to determine whether the first output and the second output are equal;
• if the first output and the second output are equal, the circuit is determined to be operating within timing requirements of the circuit;
• otherwise,
• sending a second signal to a counter in the circuit, wherein the counter increments a present state of code within the counter;
• and
• providing the incremented code to a controller in the circuit, wherein a decoder in the controller converts the incremented code to thermometer code, and wherein the thermometer code generates control signals to adjust a drive strength of a circuit driver of the first signal.