Method and System for Communication Employing Dual Slew Rates
AssigneeHewlett-Packard Development Company, L.P.
InventorGary L. Taylor
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Abstract
A bus for implementation with a computer system, as well as a computer processing device capable of interacting with such a bus, and a method of communicating signals over a bus, are disclosed. In at least one embodiment, the bus is a processor bus that includes a first processor bus portion that communicates first signals, and a second processor bus portion that communicates second signals at times determined independently of the first signals. The first and second signals respectively have first and second slew rates, the first and second slew rates being different from one another.
Claims22
A processor bus for implementation with a computer system, the processor bus comprising:
- a first processor bus portion that communicates first signals;
- and
- a second processor bus portion that communicates second signals at times determined independently of the first signals,
- wherein the first and second signals respectively have first and second slew rates, the first and second slew rates being different from one another.
The processor bus of claim 4, wherein the second signals include source synchronous data signals.
A computer processing device comprising:
- a first port capable of communicating with a first portion of a bus;
- a second port capable of communicating with a second portion of the bus;
- and
- at least one additional component coupled to the first and second ports,
- wherein first and second signals are communicated by way of the first and second ports, respectively,
- wherein the first and second signals have first and second slew rates, respectively, the first and second slew rates differing from one another, and
- wherein the first and second slew rates are digitally programmed by way of the at least one additional component.
A method of communicating signals over a processor bus, the method comprising:
- providing first and second signals respectively having first and second slew rates onto first and second portions of the processor bus at a first location;
- transmitting the first and second signals respectively along the first and second portions of the of the processor bus from the first location to the second location;
- and
- receiving the first and second signals off of the first and second portions of the processor bus at the second location,
- wherein the first and second slew rates differ from one another.
A signal communication system comprising:
- a uniform set of interconnects capable of communicating first and second signals,
- wherein the first and second signals have first and second slew rates, respectively, the first and second slew rates differing from one another.
Dependencies are inferred from the claim text.