Multichip stacking structure
AssigneeSiliconware Precision Industries Co., Ltd.
InventorsChung-Lun Liu, Chin-Huang Chang, Yi-Feng Chang, Jung-Pin Huang, Chih-Ming Huang
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AssigneeSiliconware Precision Industries Co., Ltd.
InventorsChung-Lun Liu, Chin-Huang Chang, Yi-Feng Chang, Jung-Pin Huang, Chih-Ming Huang
Estimating the term…
The present invention provides a multi-chip stacking structure. The multichip stacking structure comprises: a chip carrier; a first and a second chip modules respectively having a plurality of first and a plurality of second chips, wherein each chips has a bond pad and the chips are stacked on the chip carrier in a step-like manner to expose the bond pads; and a plurality of bonding wires for electrically connecting the bond pads of the first and the second chip modules to the chip carrier, wherein a bottom chip of the second chip module is stacked on a top chip of the first chip module by an adhesive layer having fillers therein to support the bottom chip, and the bottom chip is deviated from the top chip horizontally in a direction toward the bonding wires of the first chip module.
A multichip stacking structure, comprising
A multichip stacking structure, comprising
A multichip stacking structure, comprising
A multichip stacking structure, comprising
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