Method and Apparatus For A Semiconductor Structure Forming At Least One Via

A semiconductor structure, comprising:

• (a) a semiconductor substrate of one conductivity type, having a front surface and a back surface and forming at least one via through the semiconductor substrate, wherein the at least one via is filled with a conductive material;
• (b) a first layer, which is a semiconductor layer, disposed on the front surface of the semiconductor substrate, wherein the first semiconductor layer, compositionally graded through its depth with one or more selected dopants, comprises:
• an n-type or p-type nano-crystalline material, an n-type or p-type micro-crystalline material, an n-type or p-type poly-crystalline material, an n+ or a p+ epitaxial layer, or a combination thereof;
• an n-type or a p-type amorphous layer;
• an intrinsic layer;
• a-Si:H, a-SiC:H, a-SiGe:H, or a combination thereof, or
• μc-Si:H, μc-SiC:H, μc-SiGe:H, or a combination thereof,
• (c) a second layer, which is an insulating layer, disposed on an area of the back surface of the semiconductor substrate wherein the second insulating layer comprises an insulating material;
• and
• the conductive material is configured to electrically couple the semiconductor layer to at least one contact disposed on or over the surface of the substrate.

A method for making a photovoltaic device, comprising, in any order, the following steps:

• (I) disposing a first semiconductor layer on a front surface of a semiconductor substrate, wherein the first semiconductor layer, optionally compositionally-graded through its depth with one or more selected dopants, comprises a nano-crystalline material, a micro-crystalline material, a poly-crystalline material, an n+ epitaxial, or an amorphous layer;
• (II) disposing a second semiconductor layer on at least one first area on the back surface of the semiconductor substrate;
• (III) disposing a third semiconductor layer on at least one second area on the back surface of the semiconductor substrate, wherein the third semiconductor layer is compositionally graded through its depth, from substantially intrinsic at an interface with the substrate, to substantially conductive at an opposite side;
• (IV) forming a plurality of vias through the substrate;
• (V) filling each of the plurality of vias with a conductive material;
• (VI) forming at least one front contact on the second semiconductor layer;
• and
• (VII) forming at least one back contact on the third semiconductor layer.

A semiconductor structure, comprising:

• (a) a semiconductor substrate of one conductivity type, having a front surface and a back surface and forming at least one via through the semiconductor substrate, wherein the at least one via is filled with a conductive material;
• (b) a first layer, which is a semiconductor layer, disposed on the front surface of the semiconductor substrate, wherein the first semiconductor layer, compositionally graded through its depth with one or more selected dopants, comprises:
• an n-type or p-type nano-crystalline material, an n-type or p-type micro-crystalline material, an n-type or p-type poly-crystalline material, an n+ or a p+ epitaxial layer, or a combination thereof;
• an n-type or a p-type amorphous layer;
• an intrinsic layer;
• a-Si:H, a-SiC:H, a-SiGe:H, or a combination thereof, or
• μc-Si:H, μc-SiC:H, μc-SiGe:H, or a combination thereof,
• (c) a second layer, which is a semiconductor layer, disposed on an area of the back surface of the semiconductor substrate wherein the second semiconductor layer comprises a semiconducting material;
• and
• the conductive material is configured to electrically couple the semiconductor layer to at least one contact disposed on or over the surface of the substrate.

A semiconductor structure, comprising:

• (a) a semiconductor substrate of one conductivity type, having a front surface and a back surface and forming at least one via through the semiconductor substrate, wherein the at least one via is filled with a conductive material;
• (b) a first layer, which is a semiconductor layer, disposed on the front surface of the semiconductor substrate, wherein the first semiconductor layer, compositionally graded through its depth with one or more selected dopants, comprises:
• an n-type or p-type nano-crystalline material, an n-type or p-type micro-crystalline material, an n-type or p-type poly-crystalline material, an n+ or a p+ epitaxial layer, or a combination thereof;
• an n-type or a p-type amorphous layer;
• an intrinsic layer;
• a-Si:H, a-SiC:H, a-SiGe:H, or a combination thereof, or
• μc-Si:H, μc-SiC:H, μc-SiGe:H, or a combination thereof,
• (c) the semiconductor substrate comprises a doped region diffused into the back surface;
• and
• the conductive material is configured to electrically couple the semiconductor layer to at least one contact disposed on or over the surface of the substrate.