Semiconductor device including isolation layer

A semiconductor device comprising:

• a carrier;
• a power chip coupled to the carrier;
• a semiconductor chip including a substrate surface, a first surface separated from the substrate surface and including an active area, and an insulating layer applied to the substrate surface;
• an adhesion layer coupling the insulating layer of the semiconductor chip to the carrier;
• and
• wherein the power chip is configured to be maintained at a voltage potential relative to the semiconductor chip and is electrically connected to a contact of the semiconductor chip by a connector.

A chip-by-chip die package comprising:

• a conductive die pad;
• a first chip electrically connected to the die pad;
• a second chip bonded to the die pad by a bond layer, the second chip including an active surface, a substrate surface opposite the active surface, and an isolation layer coupled to the substrate surface;
• and
• wherein the isolation layer is disposed between the substrate surface of the second chip and the bond layer and is configured to electrically isolate the second chip from the die pad and the first chip.

A method of fabricating a semiconductor device configured for electrical isolation in a semiconductor package, the method comprising:

• providing a semiconductor wafer including a first surface having an active area;
• applying an isolation layer to a second substrate surface of the wafer opposite the first surface;
• singulating the wafer into a plurality of semiconductor chips, each semiconductor chip including an active area surface and an isolation layer surface;
• and
• mounting the isolation layer surface of at least one of the plurality of semiconductor chips to a carrier.

A method of electrically isolating a semiconductor chip from a carrier to which the semiconductor chip is attached, the method comprising:

• attaching a first power chip to the carrier with an electrically conductive bonding material;
• providing a second control chip including an active surface, a substrate surface opposite the active surface, and an isolation layer coupled to the substrate surface;
• and
• attaching the second control chip to the carrier with a bond material such that the isolation layer is disposed between the bond material and the substrate surface.

A chip-by-chip die package comprising:

• a conductive die pad;
• a first chip electrically connected to the die pad;
• a second chip bonded to the die pad by an adhesion layer, the second chip including an active surface and a substrate surface opposite the active surface;
• and
• means disposed between the substrate surface of the second chip and the adhesion layer for electrically isolating the second chip from the die pad and the first chip.