Resistance random access memory
AssigneeMacronix International Co., Ltd.
InventorsErh-Kun Lai, Chiahua Ho, Kuang-Yeu Hsieh
Life of this patent
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Abstract
A memory comprises a number of word lines in a first direction, a number of bit lines in a second direction, each coupled to at least one of the word lines, and a number of memory elements, each coupled to one of the word lines and one of the bit lines. Each memory element comprises a top electrode for connecting to a corresponding word line, a bottom electrode for connecting to a corresponding bit line, a resistive layer on the bottom electrode, and at least two separate liners, each liner having resistive materials on both ends of the liner and each liner coupled between the top electrode and the resistive layer.
Claims14
A memory, comprising:
- a number of word lines in a first direction;
- a number of bit lines in a second direction, each coupled to at least one of the word lines;
- a number of memory elements, each coupled to one of the word lines and one of the bit lines comprising:
- a top electrode for connecting to a corresponding word line;
- a bottom electrode for connecting to a corresponding bit line;
- a resistive layer on the bottom electrode;
- and
- at least two separate liners, each liner having resistive materials on both ends of the liner and each liner coupled between the top electrode and the resistive layer.
A method for fabricating a memory, comprising:
- providing a number of word lines in a first direction;
- providing a number of bit lines in a second direction;
- forming a top electrode for connecting to a corresponding word line;
- forming a bottom electrode for connection a corresponding bit line;
- forming a resistive layer on the bottom electrode;
- and
- forming at least two separate liners, each liner having resistive materials on both ends of the liner and each liner coupled between the top electrode and the oxidation resistive layer.
A method for fabricating a memory, comprising:
- providing a number of word lines in a first direction;
- providing a number of bit lines in a second direction;
- forming a bottom electrode;
- depositing an oxide layer on the bottom electrode;
- forming an insulating layer on the oxide layer;
- patterning the insulating layer, the oxide layer and the bottom electrode, thereby leaving a portion of the bottom electrode uncovered and sides of the oxide layer exposed;
- forming two separate L-shaped liners on the uncovered bottom electrodes and along the exposed sides of the oxide layer;
- forming resistive materials on both ends of each L-shaped liner;
- and
- forming a resistive layer on the uncovered bottom electrode.
Dependencies are inferred from the claim text.