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US 2008/0173953 A1Published application
Fully siliciding regions to improve performance
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Edward J. Nowak
Life of this patent
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Abstract
Structures and related methods including fully silicided regions are disclosed. In one embodiment, a structure includes a substrate; a partially silicided region located in an active region of an integrated circuit formed on the substrate; a fully silicided region located in a non-active region of the integrated circuit, and wherein the partially and fully silicided regions are formed from a common semiconductor layer.
Claims20
A structure comprising:
- a substrate;
- a partially silicided region located in an active region of an integrated circuit formed on the substrate;
- a fully silicided region located in a non-active region of the integrated circuit;
- and
- wherein the partially and fully silicided regions are formed from a common semiconductor layer.
2 more elements
The structure of clam 1, wherein the partially silicided region includes a gate conductor.
A structure comprising:
- a substrate;
- a first field effect transistor (FET) on the substrate;
- a second FET on the substrate;
- and
- a fully silicided region positioned in the substrate between adjacent source/drain regions of the first FET and the second FET.
2 more elements
A method comprising:
- forming a polysilicon layer over at least one active silicon region in a dielectric layer;
- partially siliciding a first region of the polysilicon layer over the at least one active silicon region;
- and
- fully siliciding a second region of the polysilicon layer over a non-active silicon region.
1 more element
Dependencies are inferred from the claim text.